Lines Matching refs:regs

37 uint32_t fman_memac_get_event(struct memac_regs *regs, uint32_t ev_mask)
39 return ioread32be(&regs->ievent) & ev_mask;
42 uint32_t fman_memac_get_interrupt_mask(struct memac_regs *regs)
44 return ioread32be(&regs->imask);
47 void fman_memac_ack_event(struct memac_regs *regs, uint32_t ev_mask)
49 iowrite32be(ev_mask, &regs->ievent);
52 void fman_memac_set_promiscuous(struct memac_regs *regs, bool val)
56 tmp = ioread32be(&regs->command_config);
63 iowrite32be(tmp, &regs->command_config);
66 void fman_memac_clear_addr_in_paddr(struct memac_regs *regs,
70 iowrite32be(0, &regs->mac_addr0.mac_addr_l);
71 iowrite32be(0, &regs->mac_addr0.mac_addr_u);
73 iowrite32be(0x0, &regs->mac_addr[paddr_num - 1].mac_addr_l);
74 iowrite32be(0x0, &regs->mac_addr[paddr_num - 1].mac_addr_u);
78 void fman_memac_add_addr_in_paddr(struct memac_regs *regs,
91 iowrite32be(tmp0, &regs->mac_addr0.mac_addr_l);
92 iowrite32be(tmp1, &regs->mac_addr0.mac_addr_u);
94 iowrite32be(tmp0, &regs->mac_addr[paddr_num-1].mac_addr_l);
95 iowrite32be(tmp1, &regs->mac_addr[paddr_num-1].mac_addr_u);
99 void fman_memac_enable(struct memac_regs *regs, bool apply_rx, bool apply_tx)
103 tmp = ioread32be(&regs->command_config);
111 iowrite32be(tmp, &regs->command_config);
114 void fman_memac_disable(struct memac_regs *regs, bool apply_rx, bool apply_tx)
118 tmp = ioread32be(&regs->command_config);
126 iowrite32be(tmp, &regs->command_config);
129 void fman_memac_reset_stat(struct memac_regs *regs)
133 tmp = ioread32be(&regs->statn_config);
137 iowrite32be(tmp, &regs->statn_config);
139 while (ioread32be(&regs->statn_config) & STATS_CFG_CLR);
142 void fman_memac_reset(struct memac_regs *regs)
146 tmp = ioread32be(&regs->command_config);
150 iowrite32be(tmp, &regs->command_config);
152 while (ioread32be(&regs->command_config) & CMD_CFG_SW_RESET);
155 int fman_memac_init(struct memac_regs *regs,
193 iowrite32be(tmp, &regs->command_config);
196 iowrite32be((uint32_t)cfg->max_frame_length, &regs->maxfrm);
199 iowrite32be((uint32_t)cfg->pause_quanta, &regs->pause_quanta[0]);
200 iowrite32be((uint32_t)0, &regs->pause_thresh[0]);
214 iowrite32be(tmp, &regs->if_mode);
231 iowrite32be(tmp, &regs->tx_fifo_sections);
234 fman_memac_ack_event(regs, 0xffffffff);
235 fman_memac_set_exception(regs, exceptions, TRUE);
240 void fman_memac_set_exception(struct memac_regs *regs, uint32_t val, bool enable)
244 tmp = ioread32be(&regs->imask);
250 iowrite32be(tmp, &regs->imask);
253 void fman_memac_reset_filter_table(struct memac_regs *regs)
257 iowrite32be(i & ~HASH_CTRL_MCAST_EN, &regs->hashtable_ctrl);
260 void fman_memac_set_hash_table_entry(struct memac_regs *regs, uint32_t crc)
262 iowrite32be(crc | HASH_CTRL_MCAST_EN, &regs->hashtable_ctrl);
265 void fman_memac_set_hash_table(struct memac_regs *regs, uint32_t val)
267 iowrite32be(val, &regs->hashtable_ctrl);
270 uint16_t fman_memac_get_max_frame_len(struct memac_regs *regs)
274 tmp = ioread32be(&regs->maxfrm);
280 void fman_memac_set_tx_pause_frames(struct memac_regs *regs,
287 tmp = ioread32be(&regs->tx_fifo_sections);
291 iowrite32be(tmp, &regs->tx_fifo_sections);
293 tmp = ioread32be(&regs->command_config);
298 iowrite32be(tmp, &regs->tx_fifo_sections);
300 tmp = ioread32be(&regs->command_config);
304 iowrite32be(tmp, &regs->command_config);
306 tmp = ioread32be(&regs->pause_quanta[priority / 2]);
312 iowrite32be(tmp, &regs->pause_quanta[priority / 2]);
314 tmp = ioread32be(&regs->pause_thresh[priority / 2]);
320 iowrite32be(tmp, &regs->pause_thresh[priority / 2]);
323 void fman_memac_set_rx_ignore_pause_frames(struct memac_regs *regs,bool enable)
327 tmp = ioread32be(&regs->command_config);
333 iowrite32be(tmp, &regs->command_config);
336 void fman_memac_set_wol(struct memac_regs *regs, bool enable)
340 tmp = ioread32be(&regs->command_config);
347 iowrite32be(tmp, &regs->command_config);
351 (ioread32be(&regs->bn ## _l) | \
352 ((uint64_t)ioread32be(&regs->bn ## _u) << 32))
354 uint64_t fman_memac_get_counter(struct memac_regs *regs,
445 void fman_memac_adjust_link(struct memac_regs *regs,
451 tmp = ioread32be(&regs->if_mode);
483 iowrite32be(tmp, &regs->if_mode);