iwlwifi/mvm/sta.c

300 				      sta->addr, ba_data->tid);
355 			       int sta_id, u16 *queueptr, u8 tid)
375 			if (tid == IWL_MAX_TID_COUNT)
376 				tid = IWL_MGMT_TID;
378 			remove_cmd.u.remove.tid = cpu_to_le32(tid);
396 	mvm->queue_info[queue].tid_bitmap &= ~BIT(tid);
413 	cmd.tid = mvm->queue_info[queue].txq_tid;
425 			iwl_mvm_txq_from_tid(sta, tid);
454 	int tid;
473 	for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
474 		if (mvmsta->tid_data[tid].state == IWL_AGG_ON)
475 			agg_tids |= BIT(tid);
494 	int tid;
517 	for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
519 			iwl_mvm_txq_from_tid(sta, tid);
521 		if (mvmsta->tid_data[tid].state == IWL_AGG_ON)
522 			disable_agg_tids |= BIT(tid);
523 		mvmsta->tid_data[tid].txq_id = IWL_MVM_INVALID_QUEUE;
555 	u8 sta_id, tid;
567 	tid = mvm->queue_info[queue].txq_tid;
581 	ret = iwl_mvm_disable_txq(mvm, old_sta, sta_id, &queue_tmp, tid);
667 				int sta_id, int tid, int frame_limit, u16 ssn)
678 		.tid = tid,
704 static int iwl_mvm_redirect_queue(struct iwl_mvm *mvm, int queue, int tid,
735 	cmd.tid = mvm->queue_info[queue].txq_tid;
763 	mvm->queue_info[queue].txq_tid = tid;
769 			     cmd.sta_id, tid, IWL_FRAME_LIMIT, ssn);
850 			    u8 sta_id, u8 tid, unsigned int timeout)
855 	if (tid == IWL_MAX_TID_COUNT) {
856 		tid = IWL_MGMT_TID;
894 					    tid, size, timeout);
898 					    "Failed allocating TXQ of size %d for sta mask %x tid %d, ret: %d\n",
899 					    size, sta_mask, tid, queue);
906 	IWL_DEBUG_TX_QUEUES(mvm, "Enabling TXQ #%d for sta mask 0x%x tid %d\n",
907 			    queue, sta_mask, tid);
914 					int tid)
918 		iwl_mvm_txq_from_tid(sta, tid);
926 			    "Allocating queue for sta %d on tid %d\n",
927 			    mvmsta->deflink.sta_id, tid);
929 					tid, wdg_timeout);
934 	mvm->tvqm_info[queue].txq_tid = tid;
940 	mvmsta->tid_data[tid].txq_id = queue;
948 				       int queue, u8 sta_id, u8 tid)
953 	if (mvm->queue_info[queue].tid_bitmap & BIT(tid)) {
955 			queue, tid);
963 	mvm->queue_info[queue].tid_bitmap |= BIT(tid);
967 		if (tid != IWL_MAX_TID_COUNT)
969 				tid_to_mac80211_ac[tid];
973 		mvm->queue_info[queue].txq_tid = tid;
978 			iwl_mvm_txq_from_tid(sta, tid);
1003 		.tid = cfg->tid,
1011 	if (!iwl_mvm_update_txq_mapping(mvm, sta, queue, cfg->sta_id, cfg->tid))
1031 	int tid;
1046 	tid = find_first_bit(&tid_bitmap, IWL_MAX_TID_COUNT + 1);
1047 	cmd.tid = tid;
1048 	cmd.tx_fifo = iwl_mvm_ac_to_tx_fifo[tid_to_mac80211_ac[tid]];
1057 	mvm->queue_info[queue].txq_tid = tid;
1058 	IWL_DEBUG_TX_QUEUES(mvm, "Changed TXQ %d ownership to tid %d\n",
1059 			    queue, tid);
1067 	int tid = -1;
1083 	tid = find_first_bit(&tid_bitmap, IWL_MAX_TID_COUNT + 1);
1084 	if (tid_bitmap != BIT(tid)) {
1090 	IWL_DEBUG_TX_QUEUES(mvm, "Unsharing TXQ %d, keeping tid %d\n", queue,
1091 			    tid);
1102 	ssn = IEEE80211_SEQ_TO_SN(mvmsta->tid_data[tid].seq_number);
1104 	ret = iwl_mvm_redirect_queue(mvm, queue, tid,
1105 				     tid_to_mac80211_ac[tid], ssn,
1107 				     iwl_mvm_txq_from_tid(sta, tid));
1114 	if (mvmsta->tid_data[tid].state == IWL_AGG_ON) {
1117 		mvmsta->tid_disable_agg &= ~BIT(tid);
1154 	unsigned int tid;
1163 	for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
1165 		if (iwl_mvm_tid_queued(mvm, &mvmsta->tid_data[tid]))
1166 			tid_bitmap &= ~BIT(tid);
1169 		if (mvmsta->tid_data[tid].state != IWL_AGG_OFF)
1170 			tid_bitmap &= ~BIT(tid);
1183 	for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
1186 		mvmsta->tid_data[tid].txq_id = IWL_MVM_INVALID_QUEUE;
1187 		mvm->queue_info[queue].tid_bitmap &= ~BIT(tid);
1207 				    tid, queue);
1211 			    "TXQ #%d left with tid bitmap 0x%x\n", queue,
1262 		int tid;
1276 		for_each_set_bit(tid, &queue_tid_bitmap,
1278 			if (time_after(mvm->queue_info[i].last_frame_time[tid] +
1282 			inactive_tid_bitmap |= BIT(tid);
1340 				   struct ieee80211_sta *sta, u8 ac, int tid)
1346 		.tid = tid,
1363 		return iwl_mvm_sta_alloc_queue_tvqm(mvm, sta, ac, tid);
1367 	ssn = IEEE80211_SEQ_TO_SN(mvmsta->tid_data[tid].seq_number);
1370 	if (tid == IWL_MAX_TID_COUNT) {
1418 		IWL_ERR(mvm, "No available queues for tid %d on sta_id %d\n",
1419 			tid, cfg.sta_id);
1433 			    "Allocating %squeue #%d to sta %d on tid %d\n",
1435 			    mvmsta->deflink.sta_id, tid);
1463 	 * this ra/tid in our Tx path since we stop the Qdisc when we
1467 		mvmsta->tid_data[tid].seq_number += 0x10;
1470 	mvmsta->tid_data[tid].txq_id = queue;
1472 	queue_state = mvmsta->tid_data[tid].state;
1485 			ret = iwl_mvm_sta_tx_agg(mvm, sta, tid, queue, true);
1491 		ret = iwl_mvm_redirect_queue(mvm, queue, tid, ac, ssn,
1493 					     iwl_mvm_txq_from_tid(sta, tid));
1502 	iwl_mvm_disable_txq(mvm, sta, mvmsta->deflink.sta_id, &queue_tmp, tid);
1519 		u8 tid;
1526 		tid = txq->tid;
1527 		if (tid == IEEE80211_NUM_TIDS)
1528 			tid = IWL_MAX_TID_COUNT;
1536 		if (iwl_mvm_sta_alloc_queue(mvm, txq->sta, txq->ac, tid)) {
1638 					    "Re-mapping sta %d tid %d\n",
1662 			cfg.tid = i;
1669 					    "Re-mapping sta %d tid %d to queue %d\n",
2182 		.tid = IWL_MAX_TID_COUNT,
2346 		.tid = IWL_MAX_TID_COUNT,
2546 		.tid = 0,
2770 				  bool start, int tid, u16 ssn,
2783 		cmd.add_immediate_ba_tid = tid;
2788 		cmd.remove_immediate_ba_tid = tid;
2819 				  bool start, int tid, u16 ssn,
2834 		cmd.alloc.tid = tid;
2844 		cmd.remove.tid = cpu_to_le32(tid);
2867 			      bool start, int tid, u16 ssn, u16 buf_size,
2873 					      tid, ssn, buf_size, baid);
2876 				      tid, ssn, buf_size);
2880 		       int tid, u16 ssn, bool start, u16 buf_size, u16 timeout)
2937 		baid = mvm_sta->tid_to_baid[tid];
2945 		baid = iwl_mvm_fw_baid_op(mvm, sta, start, tid, ssn, buf_size,
2966 		baid_data->tid = tid;
2969 		mvm_sta->tid_to_baid[tid] = baid;
2982 			     mvm_sta->deflink.sta_id, tid, baid);
2986 		baid = mvm_sta->tid_to_baid[tid];
3026 		       int tid, u8 queue, bool start)
3037 		mvm_sta->tid_disable_agg &= ~BIT(tid);
3040 		mvm_sta->tid_disable_agg |= BIT(tid);
3096 			     struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3104 	if (WARN_ON_ONCE(tid >= IWL_MAX_TID_COUNT))
3107 	if (mvmsta->tid_data[tid].state != IWL_AGG_QUEUED &&
3108 	    mvmsta->tid_data[tid].state != IWL_AGG_OFF) {
3111 			mvmsta->tid_data[tid].state);
3117 	if (mvmsta->tid_data[tid].txq_id == IWL_MVM_INVALID_QUEUE &&
3119 		u8 ac = tid_to_mac80211_ac[tid];
3121 		ret = iwl_mvm_sta_alloc_queue_tvqm(mvm, sta, ac, tid);
3134 	txq_id = mvmsta->tid_data[tid].txq_id;
3151 			tid, IWL_MAX_HW_QUEUES - 1);
3158 				    "Can't start tid %d agg on shared queue!\n",
3159 				    tid);
3164 			    "AGG for tid %d will be on queue #%d\n",
3165 			    tid, txq_id);
3167 	tid_data = &mvmsta->tid_data[tid];
3173 			    "Start AGG: sta %d tid %d queue %d - ssn = %d, next_recl = %d\n",
3174 			    mvmsta->deflink.sta_id, tid, txq_id,
3201 			    struct ieee80211_sta *sta, u16 tid, u16 buf_size,
3205 	struct iwl_mvm_tid_data *tid_data = &mvmsta->tid_data[tid];
3215 		.tid = tid,
3234 	mvmsta->agg_tids |= BIT(tid);
3241 		 * If there is no queue for this tid, iwl_mvm_sta_tx_agg_start()
3254 		ret = iwl_mvm_sta_tx_agg(mvm, sta, tid, queue, true);
3260 	cfg.fifo = iwl_mvm_ac_to_tx_fifo[tid_to_mac80211_ac[tid]];
3286 					   mvmsta->deflink.sta_id, tid,
3301 		ret = iwl_mvm_sta_tx_agg(mvm, sta, tid, queue, true);
3323 	IWL_DEBUG_HT(mvm, "Tx aggregation enabled on ra = %pM tid = %d\n",
3324 		     sta->addr, tid);
3354 			    struct ieee80211_sta *sta, u16 tid)
3357 	struct iwl_mvm_tid_data *tid_data = &mvmsta->tid_data[tid];
3366 		ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
3374 	IWL_DEBUG_TX_QUEUES(mvm, "Stop AGG: sta %d tid %d q %d state %d\n",
3375 			    mvmsta->deflink.sta_id, tid, txq_id,
3378 	mvmsta->agg_tids &= ~BIT(tid);
3394 		ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
3396 		iwl_mvm_sta_tx_agg(mvm, sta, tid, txq_id, false);
3408 		ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
3415 			mvmsta->deflink.sta_id, tid, tid_data->state);
3427 			    struct ieee80211_sta *sta, u16 tid)
3430 	struct iwl_mvm_tid_data *tid_data = &mvmsta->tid_data[tid];
3440 	IWL_DEBUG_TX_QUEUES(mvm, "Flush AGG: sta %d tid %d q %d state %d\n",
3441 			    mvmsta->deflink.sta_id, tid, txq_id,
3445 	mvmsta->agg_tids &= ~BIT(tid);
3455 						   BIT(tid)))
3466 		iwl_mvm_sta_tx_agg(mvm, sta, tid, txq_id, false);
4069 	int tid, ret;
4076 	for_each_set_bit(tid, &_tids, IWL_MAX_TID_COUNT)
4077 		cmd.awake_acs |= BIT(tid_to_ucode_ac[tid]);
4091 		for_each_set_bit(tid, &_tids, IWL_MAX_TID_COUNT) {
4095 			tid_data = &mvmsta->tid_data[tid];