athk/ath10k/bmi.c

7 #include "bmi.h"
15 	ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi start\n");
17 	ar->bmi.done_sent = false;
27 	ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi done\n");
29 	if (ar->bmi.done_sent) {
30 		ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi skipped\n");
34 	ar->bmi.done_sent = true;
55 	ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi get target info\n");
57 	if (ar->bmi.done_sent) {
94 	ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi get target info SDIO\n");
96 	if (ar->bmi.done_sent) {
166 	ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi read address 0x%x length %d\n",
169 	if (ar->bmi.done_sent) {
206 		   "bmi write soc register 0x%08x val 0x%08x\n",
209 	if (ar->bmi.done_sent) {
210 		ath10k_warn(ar, "bmi write soc register command in progress\n");
236 	ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi read soc register 0x%08x\n",
239 	if (ar->bmi.done_sent) {
240 		ath10k_warn(ar, "bmi read soc register command in progress\n");
256 	ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi read soc register value 0x%08x\n",
274 	ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi write address 0x%x length %d\n",
277 	if (ar->bmi.done_sent) {
320 	ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi execute address 0x%x param 0x%x\n",
323 	if (ar->bmi.done_sent) {
346 	ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi execute result 0x%x\n", *result);
363 	ath10k_dbg(ar, ATH10K_DBG_BMI, "large bmi lz data buffer 0x%pK length %d\n",
366 	if (ar->bmi.done_sent) {
414 	ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi lz data buffer 0x%pK length %d\n",
417 	if (ar->bmi.done_sent) {
451 	ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi lz stream start address 0x%x\n",
454 	if (ar->bmi.done_sent) {
480 		   "bmi fast download address 0x%x buffer 0x%pK length %d\n",
524 	if (ar->bmi.done_sent) {
525 		ath10k_warn(ar, "bmi set start command disallowed\n");