Lines Matching refs:ProcModel

756   for (auto& ProcModel : ProcModels) {
757 const RecVec &RADefs = ProcModel.ReadAdvanceDefs;
819 const CodeGenProcModel &ProcModel) const {
827 if (&getProcModel(ModelDef) != &ProcModel)
832 "defined for processor " + ProcModel.ModelName +
838 RWSeq, IsRead,ProcModel);
849 expandRWSeqForProc(Idx, RWSeq, IsRead, ProcModel);
958 const CodeGenProcModel &ProcModel =
960 ProcIndices.push_back(ProcModel.Index);
961 LLVM_DEBUG(dbgs() << "InstRW on " << ProcModel.ModelName << " for "
1174 for (CodeGenProcModel &ProcModel : ProcModels) {
1175 if (!ProcModel.hasItineraries())
1178 RecVec ItinRecords = ProcModel.ItinsDef->getValueAsListOfDefs("IID");
1179 assert(!ItinRecords.empty() && "ProcModel.hasItineraries is incorrect");
1182 ProcModel.ItinDefList.resize(NumInstrSchedClasses);
1194 ProcModel.ItinDefList[SC.Index] = ItinData;
1199 LLVM_DEBUG(dbgs() << ProcModel.ItinsDef->getName()
1205 assert(!ProcModel.ItinDefList[0] && "NoItinerary class can't have rec");
1207 for (unsigned i = 1, N = ProcModel.ItinDefList.size(); i < N; ++i) {
1208 if (!ProcModel.ItinDefList[i])
1209 dbgs() << ProcModel.ItinsDef->getName()
1235 for (CodeGenProcModel &ProcModel : ProcModels)
1237 ProcModel.UnsupportedFeaturesDefs,
1238 ProcModel.ModelDef->getValueAsListOfDefs("UnsupportedFeatures"));
1965 // Finalize each ProcModel by sorting the record arrays.
2001 for (const CodeGenProcModel &ProcModel : procModels()) {
2002 const bool HasItineraries = ProcModel.hasItineraries();
2003 if (!ProcModel.ModelDef->getValueAsBit("CompleteModel"))
2008 if (ProcModel.isUnsupported(*Inst))
2016 ProcModel.ModelDef->getName() + "'");
2030 auto I = find_if(InstRWs, [&ProcModel](const Record *R) {
2031 return R->getValueAsDef("SchedModel") == ProcModel.ModelDef;
2034 PrintError(Inst->TheDef->getLoc(), "'" + ProcModel.ModelName +