Target/XCore/XCoreFrameLowering.cpp

1 //===-- XCoreFrameLowering.cpp - Frame info for XCore Target --------------===//
9 // This file contains XCore frame information that doesn't fit anywhere else
15 #include "XCore.h"
34 static const unsigned FramePtr = XCore::R10;
106     int Opcode = isImmU6(OpImm) ? XCore::EXTSP_u6 : XCore::EXTSP_lu6;
128     int Opcode = isImmU6(OpImm) ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6;
129     BuildMI(MBB, MBBI, dl, TII.get(Opcode), XCore::SP).addImm(OpImm);
145                                       XCore::LR));
201     int Opcode = isImmU6(Offset) ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6;
242     BuildMI(MBB, MBBI, dl, TII.get(XCore::LDWSP_ru6), XCore::R11).addImm(0);
262     int Opcode = isImmU6(Adjusted) ? XCore::ENTSP_u6 : XCore::ENTSP_lu6;
263     MBB.addLiveIn(XCore::LR);
266     MIB->addRegisterKilled(XCore::LR, MF.getSubtarget().getRegisterInfo(),
270       unsigned DRegNum = MRI->getDwarfRegNum(XCore::LR, true);
287     int Opcode = isImmU6(Offset) ? XCore::STWSP_ru6 : XCore::STWSP_lru6;
307     BuildMI(MBB, MBBI, dl, TII.get(XCore::LDAWSP_ru6), FramePtr).addImm(0);
358   if (RetOpcode == XCore::EH_RETURN) {
372     BuildMI(MBB, MBBI, dl, TII.get(XCore::SETSP_1r)).addReg(EhStackReg);
373     BuildMI(MBB, MBBI, dl, TII.get(XCore::BAU_1r)).addReg(EhHandlerReg);
386     BuildMI(MBB, MBBI, dl, TII.get(XCore::SETSP_1r)).addReg(FramePtr);
398       assert(RetOpcode == XCore::RETSP_u6
399              || RetOpcode == XCore::RETSP_lu6);
400       int Opcode = isImmU6(RemainingAdj) ? XCore::RETSP_u6 : XCore::RETSP_lu6;
407       int Opcode = isImmU6(RemainingAdj) ? XCore::LDAWSP_ru6 :
408                                            XCore::LDAWSP_lru6;
409       BuildMI(MBB, MBBI, dl, TII.get(Opcode), XCore::SP).addImm(RemainingAdj);
432     assert(Reg != XCore::LR && !(Reg == XCore::R10 && hasFP(*MF)) &&
460     assert(Reg != XCore::LR && !(Reg == XCore::R10 && hasFP(*MF)) &&
511       if (Old.getOpcode() == XCore::ADJCALLSTACKDOWN) {
512         int Opcode = isU6 ? XCore::EXTSP_u6 : XCore::EXTSP_lu6;
515         assert(Old.getOpcode() == XCore::ADJCALLSTACKUP);
516         int Opcode = isU6 ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6;
517         New = BuildMI(MF, Old.getDebugLoc(), TII.get(Opcode), XCore::SP)
537   bool LRUsed = MRI.isPhysRegModified(XCore::LR);
557     SavedRegs.reset(XCore::LR);
572   const TargetRegisterClass &RC = XCore::GRRegsRegClass;