Target/SPIRV/SPIRVGlobalRegistry.cpp

18 #include "SPIRV.h"
48     SPIRV::AccessQualifier::AccessQualifier AccessQual, bool EmitIR) {
65   MRI.setRegClass(Res, &SPIRV::TYPERegClass);
71   MRI.setRegClass(Res, &SPIRV::TYPERegClass);
76   return MIRBuilder.buildInstr(SPIRV::OpTypeBool)
87           SPIRV::Extension::SPV_INTEL_arbitrary_precision_integers)) {
88     MIRBuilder.buildInstr(SPIRV::OpExtension)
89         .addImm(SPIRV::Extension::SPV_INTEL_arbitrary_precision_integers);
90     MIRBuilder.buildInstr(SPIRV::OpCapability)
91         .addImm(SPIRV::Capability::ArbitraryPrecisionIntegersINTEL);
101   auto MIB = MIRBuilder.buildInstr(SPIRV::OpTypeInt)
110   auto MIB = MIRBuilder.buildInstr(SPIRV::OpTypeFloat)
117   return MIRBuilder.buildInstr(SPIRV::OpTypeVoid)
125   assert((EleOpc == SPIRV::OpTypeInt || EleOpc == SPIRV::OpTypeFloat ||
126           EleOpc == SPIRV::OpTypeBool) &&
129   auto MIB = MIRBuilder.buildInstr(SPIRV::OpTypeVector)
154     CurMF->getRegInfo().setRegClass(Res, &SPIRV::IDRegClass);
181     MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpConstantI))
186     MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpConstantNull))
214     MF.getRegInfo().setRegClass(Res, &SPIRV::IDRegClass);
216                      SPIRV::AccessQualifier::ReadWrite, EmitIR);
224         MIB = MIRBuilder.buildInstr(SPIRV::OpConstantI)
230         MIB = MIRBuilder.buildInstr(SPIRV::OpConstantNull)
257     MF.getRegInfo().setRegClass(Res, &SPIRV::IDRegClass);
262     MIB = MIRBuilder.buildInstr(SPIRV::OpConstantF)
289     CurMF->getRegInfo().setRegClass(SpvVecConst, &SPIRV::IDRegClass);
295       MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpConstantComposite))
301       MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpConstantNull))
361     CurMF->getRegInfo().setRegClass(SpvVecConst, &SPIRV::IDRegClass);
368         auto MIB = MIRBuilder.buildInstr(SPIRV::OpConstantComposite)
374         MIRBuilder.buildInstr(SPIRV::OpConstantNull)
430     CurMF->getRegInfo().setRegClass(Res, &SPIRV::IDRegClass);
432     MIRBuilder.buildInstr(SPIRV::OpConstantNull)
452           : MIRBuilder.getMRI()->createVirtualRegister(&SPIRV::IDRegClass);
453   auto Res = MIRBuilder.buildInstr(SPIRV::OpConstantSampler)
465     const GlobalValue *GV, SPIRV::StorageClass::StorageClass Storage,
467     SPIRV::LinkageType::LinkageType LinkageType, MachineIRBuilder &MIRBuilder,
492   auto MIB = MIRBuilder.buildInstr(SPIRV::OpVariable)
528     buildOpDecorate(Reg, MIRBuilder, SPIRV::Decoration::Constant, {});
532     buildOpDecorate(Reg, MIRBuilder, SPIRV::Decoration::Alignment, {Alignment});
536     buildOpDecorate(Reg, MIRBuilder, SPIRV::Decoration::LinkageAttributes,
539   SPIRV::BuiltIn::BuiltIn BuiltInId;
541     buildOpDecorate(Reg, MIRBuilder, SPIRV::Decoration::BuiltIn,
551   assert((ElemType->getOpcode() != SPIRV::OpTypeVoid) &&
555   auto MIB = MIRBuilder.buildInstr(SPIRV::OpTypeArray)
567   auto MIB = MIRBuilder.buildInstr(SPIRV::OpTypeOpaque).addDef(ResVReg);
579     assert(ElemTy && ElemTy->getOpcode() != SPIRV::OpTypeVoid &&
584   auto MIB = MIRBuilder.buildInstr(SPIRV::OpTypeStruct).addDef(ResVReg);
590     buildOpDecorate(ResVReg, MIRBuilder, SPIRV::Decoration::CPacked, {});
596     SPIRV::AccessQualifier::AccessQualifier AccQual) {
598   return SPIRV::lowerBuiltinType(Ty, AccQual, MIRBuilder, this);
602     SPIRV::StorageClass::StorageClass SC, SPIRVType *ElemType,
606   return MIRBuilder.buildInstr(SPIRV::OpTypePointer)
613     SPIRV::StorageClass::StorageClass SC, MachineIRBuilder &MIRBuilder) {
614   return MIRBuilder.buildInstr(SPIRV::OpTypeForwardPointer)
622   auto MIB = MIRBuilder.buildInstr(SPIRV::OpTypeFunction)
644     SPIRV::AccessQualifier::AccessQualifier AccQual, bool EmitIR) {
655   if (SpirvType->getOpcode() == SPIRV::OpTypeForwardPointer)
662     SPIRV::AccessQualifier::AccessQualifier AccQual, bool EmitIR) {
732     SPIRV::AccessQualifier::AccessQualifier AccessQual, bool EmitIR) {
743   if (SpirvType->getOpcode() != SPIRV::OpTypeForwardPointer && !Reg.isValid() &&
768     SPIRV::AccessQualifier::AccessQualifier AccessQual, bool EmitIR) {
809   if (Type->getOpcode() == SPIRV::OpTypeVector) {
820   if (Type->getOpcode() == SPIRV::OpTypeVector) {
824   if (Type->getOpcode() == SPIRV::OpTypeInt ||
825       Type->getOpcode() == SPIRV::OpTypeFloat)
827   if (Type->getOpcode() == SPIRV::OpTypeBool)
834   if (Type->getOpcode() == SPIRV::OpTypeVector) {
838   if (Type->getOpcode() == SPIRV::OpTypeInt)
843 SPIRV::StorageClass::StorageClass
846   assert(Type && Type->getOpcode() == SPIRV::OpTypePointer &&
848   return static_cast<SPIRV::StorageClass::StorageClass>(
853     MachineIRBuilder &MIRBuilder, SPIRVType *SampledType, SPIRV::Dim::Dim Dim,
855     SPIRV::ImageFormat::ImageFormat ImageFormat,
856     SPIRV::AccessQualifier::AccessQualifier AccessQual) {
857   SPIRV::ImageTypeDescriptor TD(SPIRVToLLVMType.lookup(SampledType), Dim, Depth,
864   return MIRBuilder.buildInstr(SPIRV::OpTypeImage)
878   SPIRV::SamplerTypeDescriptor TD;
883   return MIRBuilder.buildInstr(SPIRV::OpTypeSampler).addDef(ResVReg);
888     SPIRV::AccessQualifier::AccessQualifier AccessQual) {
889   SPIRV::PipeTypeDescriptor TD(AccessQual);
894   return MIRBuilder.buildInstr(SPIRV::OpTypePipe)
901   SPIRV::DeviceEventTypeDescriptor TD;
906   return MIRBuilder.buildInstr(SPIRV::OpTypeDeviceEvent).addDef(ResVReg);
911   SPIRV::SampledImageTypeDescriptor TD(
919   return MIRBuilder.buildInstr(SPIRV::OpTypeSampledImage)
936 SPIRVGlobalRegistry::checkSpecialInstr(const SPIRV::SpecialTypeDescriptor &TD,
947     SPIRV::StorageClass::StorageClass SC,
948     SPIRV::AccessQualifier::AccessQualifier AQ) {
955         SPIRV::parseBuiltinTypeNameToTargetExtType(TypeStr.str(), MIRBuilder),
996     llvm_unreachable("Unable to recognize SPIRV type name.");
1045   auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpTypeInt))
1068   auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpTypeBool))
1091   auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpTypeVector))
1110   auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpTypeArray))
1120     SPIRV::StorageClass::StorageClass SC) {
1130                      MIRBuilder.getTII().get(SPIRV::OpTypePointer))
1140     SPIRV::StorageClass::StorageClass SC) {
1149   auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpTypePointer))
1170   CurMF->getRegInfo().setRegClass(Res, &SPIRV::IDRegClass);
1175   MIB = BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(SPIRV::OpUndef))