Target/PowerPC/PPCISelLowering.cpp

160 PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM,
1546 void PPCTargetLowering::initializeAddrModeMap() {
1625 uint64_t PPCTargetLowering::getByValTypeAlignment(Type *Ty,
1635 bool PPCTargetLowering::useSoftFloat() const {
1639 bool PPCTargetLowering::hasSPE() const {
1643 bool PPCTargetLowering::preferIncOfAddToSubOfNot(EVT VT) const {
1647 bool PPCTargetLowering::shallExtractConstSplatVectorElementToStore(
1668 const char *PPCTargetLowering::getTargetNodeName(unsigned Opcode) const {
1839 EVT PPCTargetLowering::getSetCCResultType(const DataLayout &DL, LLVMContext &C,
1847 bool PPCTargetLowering::enableAggressiveFMAFusion(EVT VT) const {
2665 bool PPCTargetLowering::SelectAddressEVXRegReg(SDValue N, SDValue &Base,
2700 bool PPCTargetLowering::SelectAddressRegReg(
2791 bool PPCTargetLowering::SelectAddressRegImm(
2896 bool PPCTargetLowering::SelectAddressRegImm34(SDValue N, SDValue &Disp,
2945 bool PPCTargetLowering::SelectAddressRegRegOnly(SDValue N, SDValue &Base,
2983 bool PPCTargetLowering::SelectAddressPCRel(SDValue N, SDValue &Base) const {
3043 bool PPCTargetLowering::getPreIndexedAddressParts(SDNode *N, SDValue &Base,
3171 SDValue PPCTargetLowering::getTOCEntry(SelectionDAG &DAG, const SDLoc &dl,
3186 SDValue PPCTargetLowering::LowerConstantPool(SDValue Op,
3227 unsigned PPCTargetLowering::getJumpTableEncoding() const {
3234 bool PPCTargetLowering::isJumpTableRelative() const {
3242 SDValue PPCTargetLowering::getPICJumpTableRelocBase(SDValue Table,
3258 PPCTargetLowering::getPICJumpTableRelocBaseExpr(const MachineFunction *MF,
3273 SDValue PPCTargetLowering::LowerJumpTable(SDValue Op, SelectionDAG &DAG) const {
3310 SDValue PPCTargetLowering::LowerBlockAddress(SDValue Op,
3348 SDValue PPCTargetLowering::LowerGlobalTLSAddress(SDValue Op,
3356 SDValue PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
3435 SDValue PPCTargetLowering::LowerGlobalTLSAddressLinux(SDValue Op,
3563 SDValue PPCTargetLowering::LowerGlobalAddress(SDValue Op,
3612 SDValue PPCTargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const {
3688 SDValue PPCTargetLowering::LowerVAARG(SDValue Op, SelectionDAG &DAG) const {
3787 SDValue PPCTargetLowering::LowerVACOPY(SDValue Op, SelectionDAG &DAG) const {
3798 SDValue PPCTargetLowering::LowerADJUST_TRAMPOLINE(SDValue Op,
3806 SDValue PPCTargetLowering::LowerINLINEASM(SDValue Op, SelectionDAG &DAG) const {
3857 SDValue PPCTargetLowering::LowerINIT_TRAMPOLINE(SDValue Op,
3896 SDValue PPCTargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG) const {
4099 SDValue PPCTargetLowering::LowerFormalArguments(
4114 SDValue PPCTargetLowering::LowerFormalArguments_32SVR4(
4365 SDValue PPCTargetLowering::extendArgForPPC64(ISD::ArgFlagsTy Flags,
4379 SDValue PPCTargetLowering::LowerFormalArguments_64SVR4(
4935 bool PPCTargetLowering::IsEligibleForTailCallOptimization_64SVR4(
5022 bool PPCTargetLowering::IsEligibleForTailCallOptimization(
5142 SDValue PPCTargetLowering::EmitTailCallLoadFPAndRetAddr(
5231 SDValue PPCTargetLowering::LowerCallResult(
5325 static unsigned getCallOpcode(PPCTargetLowering::CallFlags CFlags,
5589                   PPCTargetLowering::CallFlags CFlags, const SDLoc &dl,
5670 SDValue PPCTargetLowering::FinishCall(
5740 bool PPCTargetLowering::supportsTailCallFor(const CallBase *CB) const {
5761 bool PPCTargetLowering::isEligibleForTCO(
5780 PPCTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
5857 SDValue PPCTargetLowering::LowerCall_32SVR4(
5864   // See PPCTargetLowering::LowerFormalArguments_32SVR4() for a description
6096 SDValue PPCTargetLowering::createMemcpyOutsideCallSeq(
6111 SDValue PPCTargetLowering::LowerCall_64SVR4(
7059 SDValue PPCTargetLowering::LowerFormalArguments_AIX(
7361 SDValue PPCTargetLowering::LowerCall_AIX(
7368   // See PPCTargetLowering::LowerFormalArguments_AIX() for a description of the
7683 PPCTargetLowering::CanLowerReturn(CallingConv::ID CallConv,
7696 PPCTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv,
7761 PPCTargetLowering::LowerGET_DYNAMIC_AREA_OFFSET(SDValue Op,
7777 SDValue PPCTargetLowering::LowerSTACKRESTORE(SDValue Op,
7805 SDValue PPCTargetLowering::getReturnAddrFrameIndex(SelectionDAG &DAG) const {
7828 PPCTargetLowering::getFramePointerFrameIndex(SelectionDAG & DAG) const {
7850 SDValue PPCTargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,
7872 SDValue PPCTargetLowering::LowerEH_DWARF_CFA(SDValue Op,
7883 SDValue PPCTargetLowering::lowerEH_SJLJ_SETJMP(SDValue Op,
7891 SDValue PPCTargetLowering::lowerEH_SJLJ_LONGJMP(SDValue Op,
7898 SDValue PPCTargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const {
7923 SDValue PPCTargetLowering::LowerSTORE(SDValue Op, SelectionDAG &DAG) const {
7946 SDValue PPCTargetLowering::LowerTRUNCATE(SDValue Op, SelectionDAG &DAG) const {
7954 SDValue PPCTargetLowering::LowerTRUNCATEVector(SDValue Op,
8037 SDValue PPCTargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const {
8245 void PPCTargetLowering::LowerFP_TO_INTForReuse(SDValue Op, ReuseLoadInfo &RLI,
8292 SDValue PPCTargetLowering::LowerFP_TO_INTDirectMove(SDValue Op,
8303 SDValue PPCTargetLowering::LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG,
8411 bool PPCTargetLowering::canReuseLoadAddress(SDValue Op, EVT MemVT,
8469 void PPCTargetLowering::spliceIntoChain(SDValue ResChain,
8489 bool PPCTargetLowering::directMoveIsProfitable(const SDValue &Op) const {
8547 SDValue PPCTargetLowering::LowerINT_TO_FPDirectMove(SDValue Op,
8584 SDValue PPCTargetLowering::LowerINT_TO_FPVector(SDValue Op, SelectionDAG &DAG,
8644 SDValue PPCTargetLowering::LowerINT_TO_FP(SDValue Op,
8902 SDValue PPCTargetLowering::LowerGET_ROUNDING(SDValue Op,
8974 SDValue PPCTargetLowering::LowerSHL_PARTS(SDValue Op, SelectionDAG &DAG) const {
9003 SDValue PPCTargetLowering::LowerSRL_PARTS(SDValue Op, SelectionDAG &DAG) const {
9032 SDValue PPCTargetLowering::LowerSRA_PARTS(SDValue Op, SelectionDAG &DAG) const {
9061 SDValue PPCTargetLowering::LowerFunnelShift(SDValue Op,
9210 SDValue PPCTargetLowering::LowerBITCAST(SDValue Op, SelectionDAG &DAG) const {
9321 SDValue PPCTargetLowering::LowerBUILD_VECTOR(SDValue Op,
9697 SDValue PPCTargetLowering::lowerToVINSERTB(ShuffleVectorSDNode *N,
9798 SDValue PPCTargetLowering::lowerToVINSERTH(ShuffleVectorSDNode *N,
9910 SDValue PPCTargetLowering::lowerToXXSPLTI32DX(ShuffleVectorSDNode *SVN,
9985 SDValue PPCTargetLowering::LowerROTL(SDValue Op, SelectionDAG &DAG) const {
10015 SDValue PPCTargetLowering::LowerVECTOR_SHUFFLE(SDValue Op,
10308 SDValue PPCTargetLowering::LowerVPERM(SDValue Op, SelectionDAG &DAG,
10727 SDValue PPCTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
10977 SDValue PPCTargetLowering::LowerINTRINSIC_VOID(SDValue Op,
11008 SDValue PPCTargetLowering::LowerBSWAP(SDValue Op, SelectionDAG &DAG) const {
11028 SDValue PPCTargetLowering::LowerATOMIC_CMP_SWAP(SDValue Op,
11062 SDValue PPCTargetLowering::LowerATOMIC_LOAD_STORE(SDValue Op,
11252 SDValue PPCTargetLowering::LowerIS_FPCLASS(SDValue Op,
11262 SDValue PPCTargetLowering::LowerSCALAR_TO_VECTOR(SDValue Op,
11278 SDValue PPCTargetLowering::LowerINSERT_VECTOR_ELT(SDValue Op,
11343 SDValue PPCTargetLowering::LowerVectorLoad(SDValue Op,
11388 SDValue PPCTargetLowering::LowerVectorStore(SDValue Op,
11448 SDValue PPCTargetLowering::LowerMUL(SDValue Op, SelectionDAG &DAG) const {
11512 SDValue PPCTargetLowering::LowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const {
11522 SDValue PPCTargetLowering::LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const {
11600 SDValue PPCTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
11694 void PPCTargetLowering::ReplaceNodeResults(SDNode *N,
11810 Instruction *PPCTargetLowering::emitLeadingFence(IRBuilderBase &Builder,
11820 Instruction *PPCTargetLowering::emitTrailingFence(IRBuilderBase &Builder,
11840 PPCTargetLowering::EmitAtomicBinary(MachineInstr &MI, MachineBasicBlock *BB,
12015 MachineBasicBlock *PPCTargetLowering::EmitPartwordAtomicBinary(
12230 PPCTargetLowering::emitEHSjLjSetJmp(MachineInstr &MI,
12372 PPCTargetLowering::emitEHSjLjLongJmp(MachineInstr &MI,
12473 bool PPCTargetLowering::hasInlineStackProbe(const MachineFunction &MF) const {
12481 unsigned PPCTargetLowering::getStackProbeSize(const MachineFunction &MF) const {
12503 PPCTargetLowering::emitProbedAlloca(MachineInstr &MI,
12665 PPCTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
13489 SDValue PPCTargetLowering::getSqrtInputTest(SDValue Op, SelectionDAG &DAG,
13519 PPCTargetLowering::getSqrtResultForDenormInput(SDValue Op,
13530 SDValue PPCTargetLowering::getSqrtEstimate(SDValue Operand, SelectionDAG &DAG,
13550 SDValue PPCTargetLowering::getRecipEstimate(SDValue Operand, SelectionDAG &DAG,
13565 unsigned PPCTargetLowering::combineRepeatedFPDivisors() const {
13817 SDValue PPCTargetLowering::ConvertSETCCToSubtract(SDNode *N,
13857 SDValue PPCTargetLowering::DAGCombineTruncBoolExt(SDNode *N,
14133 SDValue PPCTargetLowering::DAGCombineExtBoolTrunc(SDNode *N,
14409 SDValue PPCTargetLowering::combineSetCC(SDNode *N,
14455 SDValue PPCTargetLowering::
14813 SDValue PPCTargetLowering::DAGCombineBuildVector(SDNode *N,
14904 SDValue PPCTargetLowering::combineFPToIntToFP(SDNode *N,
15013 SDValue PPCTargetLowering::expandVSXLoadForLE(SDNode *N,
15079 SDValue PPCTargetLowering::expandVSXStoreForLE(SDNode *N,
15142 SDValue PPCTargetLowering::combineStoreFPToInt(SDNode *N,
15302 SDValue PPCTargetLowering::combineVectorShuffle(ShuffleVectorSDNode *SVN,
15480 SDValue PPCTargetLowering::combineVReverseMemOP(ShuffleVectorSDNode *SVN,
15564 SDValue PPCTargetLowering::PerformDAGCombine(SDNode *N,
16359 PPCTargetLowering::BuildSDIVPow2(SDNode *N, const APInt &Divisor,
16392 void PPCTargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
16447 Align PPCTargetLowering::getPrefLoopAlignment(MachineLoop *ML) const {
16497 PPCTargetLowering::ConstraintType
16498 PPCTargetLowering::getConstraintType(StringRef Constraint) const {
16532 PPCTargetLowering::getSingleConstraintMatchWeight(
16588 PPCTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
16721 void PPCTargetLowering::LowerAsmOperandForConstraint(SDValue Op,
16796 void PPCTargetLowering::CollectTargetIntrinsicOperands(const CallInst &I,
16816 bool PPCTargetLowering::isLegalAddressingMode(const DataLayout &DL,
16859 SDValue PPCTargetLowering::LowerRETURNADDR(SDValue Op,
16899 SDValue PPCTargetLowering::LowerFRAMEADDR(SDValue Op,
16929 Register PPCTargetLowering::getRegisterByName(const char* RegName, LLT VT,
16948 bool PPCTargetLowering::isAccessedAsGotIndirect(SDValue GA) const {
16975 PPCTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const {
16980 bool PPCTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
17137 EVT PPCTargetLowering::getOptimalMemOpType(
17167 bool PPCTargetLowering::shouldConvertConstantLoadToIntImm(const APInt &Imm,
17175 bool PPCTargetLowering::isTruncateFree(Type *Ty1, Type *Ty2) const {
17183 bool PPCTargetLowering::isTruncateFree(EVT VT1, EVT VT2) const {
17191 bool PPCTargetLowering::isZExtFree(SDValue Val, EVT VT2) const {
17211 bool PPCTargetLowering::isFPExtFree(EVT DestVT, EVT SrcVT) const {
17220 bool PPCTargetLowering::isLegalICmpImmediate(int64_t Imm) const {
17224 bool PPCTargetLowering::isLegalAddImmediate(int64_t Imm) const {
17228 bool PPCTargetLowering::allowsMisalignedMemoryAccesses(EVT VT, unsigned, Align,
17266 bool PPCTargetLowering::decomposeMulByConstant(LLVMContext &Context, EVT VT,
17293 bool PPCTargetLowering::isFMAFasterThanFMulAndFAdd(const MachineFunction &MF,
17299 bool PPCTargetLowering::isFMAFasterThanFMulAndFAdd(const Function &F,
17315 bool PPCTargetLowering::isProfitableToHoist(Instruction *I) const {
17367 PPCTargetLowering::getScratchRegisters(CallingConv::ID) const {
17379 Register PPCTargetLowering::getExceptionPointerRegister(
17384 Register PPCTargetLowering::getExceptionSelectorRegister(
17390 PPCTargetLowering::shouldExpandBuildVectorWithShuffles(
17401 Sched::Preference PPCTargetLowering::getSchedulingPreference(SDNode *N) const {
17410 PPCTargetLowering::createFastISel(FunctionLoweringInfo &FuncInfo,
17428 SDValue PPCTargetLowering::getNegatedExpression(SDValue Op, SelectionDAG &DAG,
17494 bool PPCTargetLowering::useLoadStackGuardNode() const {
17502 void PPCTargetLowering::insertSSPDeclarations(Module &M) const {
17512 Value *PPCTargetLowering::getSDagStackGuard(const Module &M) const {
17518 bool PPCTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT,
17583 SDValue PPCTargetLowering::combineSHL(SDNode *N, DAGCombinerInfo &DCI) const {
17613 SDValue PPCTargetLowering::combineSRA(SDNode *N, DAGCombinerInfo &DCI) const {
17620 SDValue PPCTargetLowering::combineSRL(SDNode *N, DAGCombinerInfo &DCI) const {
17758 SDValue PPCTargetLowering::combineADD(SDNode *N, DAGCombinerInfo &DCI) const {
17777 SDValue PPCTargetLowering::combineTRUNCATE(SDNode *N,
17820 SDValue PPCTargetLowering::combineMUL(SDNode *N, DAGCombinerInfo &DCI) const {
17907 SDValue PPCTargetLowering::combineFMALike(SDNode *N,
17942 bool PPCTargetLowering::mayBeEmittedAsTailCall(const CallInst *CI) const {
17972 bool PPCTargetLowering::
17991 PPC::AddrMode PPCTargetLowering::getAddrModeForFlags(unsigned Flags) const {
18107 unsigned PPCTargetLowering::computeMOFlags(const SDNode *Parent, SDValue N,
18224 PPC::AddrMode PPCTargetLowering::SelectForceXFormMode(SDValue N, SDValue &Disp,
18258 bool PPCTargetLowering::splitValueIntoRegisterParts(
18276 SDValue PPCTargetLowering::lowerToLibCall(const char *LibCallName, SDValue Op,
18315 SDValue PPCTargetLowering::lowerLibCallBasedOnType(
18327 bool PPCTargetLowering::isLowringToMASSFiniteSafe(SDValue Op) const {
18333 bool PPCTargetLowering::isLowringToMASSSafe(SDValue Op) const {
18337 bool PPCTargetLowering::isScalarMASSConversionEnabled() const {
18341 SDValue PPCTargetLowering::lowerLibCallBase(const char *LibCallDoubleName,
18358 SDValue PPCTargetLowering::lowerPow(SDValue Op, SelectionDAG &DAG) const {
18363 SDValue PPCTargetLowering::lowerSin(SDValue Op, SelectionDAG &DAG) const {
18368 SDValue PPCTargetLowering::lowerCos(SDValue Op, SelectionDAG &DAG) const {
18373 SDValue PPCTargetLowering::lowerLog(SDValue Op, SelectionDAG &DAG) const {
18378 SDValue PPCTargetLowering::lowerLog10(SDValue Op, SelectionDAG &DAG) const {
18383 SDValue PPCTargetLowering::lowerExp(SDValue Op, SelectionDAG &DAG) const {
18402 PPC::AddrMode PPCTargetLowering::SelectOptimalAddrMode(const SDNode *Parent,
18537 CCAssignFn *PPCTargetLowering::ccAssignFnForCall(CallingConv::ID CC,
18548 bool PPCTargetLowering::shouldInlineQuadwordAtomics() const {
18553 PPCTargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const {
18570 PPCTargetLowering::shouldExpandAtomicCmpXchgInIR(AtomicCmpXchgInst *AI) const {
18599 Value *PPCTargetLowering::emitMaskedAtomicRMWIntrinsic(
18621 Value *PPCTargetLowering::emitMaskedAtomicCmpXchgIntrinsic(