Target/AMDGPU/AMDGPUCodeGenPrepare.cpp

25 #include "llvm/IR/IRBuilder.h"
148   Type *getI32Ty(IRBuilder<> &B, const Type *T) const;
248   Value* expandDivRem24(IRBuilder<> &Builder, BinaryOperator &I,
252   Value *expandDivRem24Impl(IRBuilder<> &Builder, BinaryOperator &I,
257   Value* expandDivRem32(IRBuilder<> &Builder, BinaryOperator &I,
260   Value *shrinkDivRem64(IRBuilder<> &Builder, BinaryOperator &I,
275   Value *applyFractPat(IRBuilder<> &Builder, Value *FractArg);
280   Value *optimizeWithRsq(IRBuilder<> &Builder, Value *Num, Value *Den,
284   Value *optimizeWithRcp(IRBuilder<> &Builder, Value *Num, Value *Den,
286   Value *optimizeWithFDivFast(IRBuilder<> &Builder, Value *Num, Value *Den,
289   Value *visitFDivElement(IRBuilder<> &Builder, Value *Num, Value *Den,
294   std::pair<Value *, Value *> getFrexpResults(IRBuilder<> &Builder,
297   Value *emitRcpIEEE1ULP(IRBuilder<> &Builder, Value *Src,
299   Value *emitFrexpDiv(IRBuilder<> &Builder, Value *LHS, Value *RHS,
301   Value *emitSqrtIEEE2ULP(IRBuilder<> &Builder, Value *Src,
383 Type *AMDGPUCodeGenPrepareImpl::getI32Ty(IRBuilder<> &B, const Type *T) const {
473   IRBuilder<> Builder(&I);
514   IRBuilder<> Builder(&I);
541   IRBuilder<> Builder(&I);
573   IRBuilder<> Builder(&I);
600 static void extractValues(IRBuilder<> &Builder,
612 static Value *insertValues(IRBuilder<> &Builder,
642   IRBuilder<> Builder(&I);
750   IRBuilder<> Builder(&BO);
767 AMDGPUCodeGenPrepareImpl::getFrexpResults(IRBuilder<> &Builder,
787 Value *AMDGPUCodeGenPrepareImpl::emitRcpIEEE1ULP(IRBuilder<> &Builder,
811 Value *AMDGPUCodeGenPrepareImpl::emitFrexpDiv(IRBuilder<> &Builder, Value *LHS,
838 Value *AMDGPUCodeGenPrepareImpl::emitSqrtIEEE2ULP(IRBuilder<> &Builder,
861 static Value *emitRsqIEEE1ULP(IRBuilder<> &Builder, Value *Src,
901     IRBuilder<> &Builder, Value *Num, Value *Den, const FastMathFlags DivFMF,
920     IRBuilder<>::FastMathFlagGuard Guard(Builder);
943 AMDGPUCodeGenPrepareImpl::optimizeWithRcp(IRBuilder<> &Builder, Value *Num,
1007     IRBuilder<> &Builder, Value *Num, Value *Den, float ReqdAccuracy) const {
1032     IRBuilder<> &Builder, Value *Num, Value *Den, FastMathFlags DivFMF,
1119   IRBuilder<> Builder(FDiv.getParent(), std::next(FDiv.getIterator()));
1170 static std::pair<Value*, Value*> getMul64(IRBuilder<> &Builder,
1184 static Value* getMulHu(IRBuilder<> &Builder, Value *LHS, Value *RHS) {
1212 Value *AMDGPUCodeGenPrepareImpl::expandDivRem24(IRBuilder<> &Builder,
1223     IRBuilder<> &Builder, BinaryOperator &I, Value *Num, Value *Den,
1357 static Value *getSign32(Value *V, IRBuilder<> &Builder, const DataLayout *DL) {
1367 Value *AMDGPUCodeGenPrepareImpl::expandDivRem32(IRBuilder<> &Builder,
1492 Value *AMDGPUCodeGenPrepareImpl::shrinkDivRem64(IRBuilder<> &Builder,
1564     IRBuilder<> Builder(&I);
1630     IRBuilder<> Builder(&I);
1700   IRBuilder<> Builder(&I);
1910     IRBuilder<> B(BB->getTerminator());
1978   IRBuilder<> B(I.getParent());
2075 Value *AMDGPUCodeGenPrepareImpl::applyFractPat(IRBuilder<> &Builder,
2101   IRBuilder<> Builder(&I);
2159   IRBuilder<> Builder(&Sqrt);