nxge/xgehal/xgehal-mgmt.c

765 	u64 val64;
778 	    val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
781 	        val64 |= XGE_HAL_ADAPTER_LED_ON;
783 	        val64 &= ~XGE_HAL_ADAPTER_LED_ON;
786 	    xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
802 	val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
804 	val64 |= 0x0000800000000000ULL;
806 	               val64, &bar0->beacon_control);
821 	u64 val64 = 0;
829 	    val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
831 	    val64 ^= XGE_HAL_ADAPTER_LED_ON;
832 	    xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
844 	val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
846 	val64 ^= XGE_HAL_GPIO_CTRL_GPIO_0;
847 	xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
869 	u64 val64;
872 	val64 = XGE_HAL_I2C_CONTROL_DEV_ID(XGE_DEV_ID) |
877 	__hal_serial_mem_write64(hldev, val64, &bar0->i2c_control);
880 	    val64 = __hal_serial_mem_read64(hldev, &bar0->i2c_control);
881 	    if (XGE_HAL_I2C_CONTROL_CNTL_END(val64)) {
882 	        *data = XGE_HAL_I2C_CONTROL_GET_DATA(val64);
913 	u64 val64;
916 	val64 = XGE_HAL_I2C_CONTROL_DEV_ID(XGE_DEV_ID) |
921 	__hal_serial_mem_write64(hldev, val64, &bar0->i2c_control);
924 	    val64 = __hal_serial_mem_read64(hldev, &bar0->i2c_control);
925 	    if (XGE_HAL_I2C_CONTROL_CNTL_END(val64)) {
926 	        if (!(val64 & XGE_HAL_I2C_CONTROL_NACK))
953 	u64 val64 = 0;
956 	val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
958 	if (val64 != 0x123456789abcdefULL) {
963 	val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
965 	if (val64 != 0xc000ffff00000000ULL) {
970 	val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
972 	if (val64 != 0x0808080808080808ULL) {
977 	val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
979 	if (val64 != 0x000000001923141EULL) {
984 	val64 = 0x5A5A5A5A5A5A5A5AULL;
985 	xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
987 	val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
989 	if (val64 != 0x5A5A5A5A5A5A5A5AULL) {
994 	val64 = 0xA5A5A5A5A5A5A5A5ULL;
995 	xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
997 	val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
999 	if (val64 != 0xA5A5A5A5A5A5A5A5ULL) {
1025 	u64 val64;
1028 	val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
1030 	val64 &= ~XGE_HAL_ADAPTER_ECC_EN;
1031 	xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
1034 	val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
1036 	val64 |= XGE_HAL_MC_RLDRAM_TEST_MODE;
1037 	xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
1040 	val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
1042 	val64 |= XGE_HAL_MC_RLDRAM_QUEUE_SIZE_ENABLE;
1043 	__hal_serial_mem_write64(hldev, val64, &bar0->i2c_control);
1045 	val64 |= XGE_HAL_MC_RLDRAM_MRS_ENABLE;
1046 	__hal_serial_mem_write64(hldev, val64, &bar0->i2c_control);
1049 	    val64 = 0x55555555aaaa0000ULL;
1051 	        val64 ^= 0xFFFFFFFFFFFF0000ULL;
1053 	    xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
1056 	    val64 = 0xaaaa5a5555550000ULL;
1058 	        val64 ^= 0xFFFFFFFFFFFF0000ULL;
1060 	    xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
1063 	    val64 = 0x55aaaaaaaa5a0000ULL;
1065 	        val64 ^= 0xFFFFFFFFFFFF0000ULL;
1067 	    xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
1070 	    val64 = (u64) (0x0000003fffff0000ULL);
1071 	    xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
1075 	    val64 = XGE_HAL_MC_RLDRAM_TEST_MODE;
1076 	    xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
1079 	    val64 |=
1082 	    xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
1086 	        val64 = xge_os_pio_mem_read64(hldev->pdev,
1088 	        if (val64 & XGE_HAL_MC_RLDRAM_TEST_DONE)
1096 	    val64 = XGE_HAL_MC_RLDRAM_TEST_MODE;
1097 	    xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
1100 	    val64 |= XGE_HAL_MC_RLDRAM_TEST_MODE |
1102 	    xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
1106 	        val64 = xge_os_pio_mem_read64(hldev->pdev,
1108 	        if (val64 & XGE_HAL_MC_RLDRAM_TEST_DONE)
1116 	    val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
1118 	    if (val64 & XGE_HAL_MC_RLDRAM_TEST_PASS)
1146 	u64 val64;
1154 	val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
1158 	    val64 |= ( XGE_HAL_MAC_CFG_TMAC_LOOPBACK | XGE_HAL_MAC_CFG_RMAC_PROM_ENABLE );
1161 	        (u32)(val64 >> 32), (char*)&bar0->mac_cfg);
1165 	val64 = XGE_HAL_MDIO_CONTROL_MMD_INDX_ADDR(0)  |
1170 	__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
1172 	val64 |= XGE_HAL_MDIO_CONTROL_MMD_CTRL(XGE_HAL_MDIO_CTRL_START);
1173 	__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
1175 	val64 = XGE_HAL_MDIO_CONTROL_MMD_INDX_ADDR(0)  |
1180 	__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
1182 	val64 |= XGE_HAL_MDIO_CONTROL_MMD_CTRL(XGE_HAL_MDIO_CTRL_START);
1183 	__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
1185 	val64 = __hal_serial_mem_read64(hldev, &bar0->mdio_control);
1187 	data = (u16)XGE_HAL_MDIO_CONTROL_MMD_DATA_GET(val64);
1196 	val64 = XGE_HAL_MDIO_CONTROL_MMD_INDX_ADDR(0)  |
1201 	__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
1203 	val64 |= XGE_HAL_MDIO_CONTROL_MMD_CTRL(XGE_HAL_MDIO_CTRL_START);
1204 	__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
1206 	val64 = XGE_HAL_MDIO_CONTROL_MMD_INDX_ADDR(0)  |
1212 	__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
1214 	val64 |= XGE_HAL_MDIO_CONTROL_MMD_CTRL(XGE_HAL_MDIO_CTRL_START);
1215 	__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
1217 	val64 = XGE_HAL_MDIO_CONTROL_MMD_INDX_ADDR(0)  |
1222 	__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
1224 	val64 |= XGE_HAL_MDIO_CONTROL_MMD_CTRL(XGE_HAL_MDIO_CTRL_START);
1225 	__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
1235 	u64 val64 = 0x0;
1240 	val64 = XGE_HAL_MDIO_CONTROL_MMD_INDX_ADDR(addr)  |
1244 	__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
1246 	val64 |= XGE_HAL_MDIO_CONTROL_MMD_CTRL(XGE_HAL_MDIO_CTRL_START);
1247 	__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
1250 	    val64 = __hal_serial_mem_read64(hldev, &bar0->mdio_control);
1255 	}while((val64 & XGE_HAL_MDIO_CONTROL_MMD_CTRL(0xF)) != XGE_HAL_MDIO_CONTROL_MMD_CTRL(1));
1258 	val64 = XGE_HAL_MDIO_CONTROL_MMD_INDX_ADDR(addr)  |
1262 	__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
1264 	val64 |= XGE_HAL_MDIO_CONTROL_MMD_CTRL(XGE_HAL_MDIO_CTRL_START);
1265 	__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
1271 	    val64 = __hal_serial_mem_read64(hldev, &bar0->mdio_control);
1276 	}while((val64 & XGE_HAL_MDIO_CONTROL_MMD_CTRL(0xF)) != XGE_HAL_MDIO_CONTROL_MMD_CTRL(1));
1278 	rval16 = (u16)XGE_HAL_MDIO_CONTROL_MMD_DATA_GET(val64);
1286 	u64 val64 = 0x0;
1292 	val64 = XGE_HAL_MDIO_CONTROL_MMD_INDX_ADDR(addr)  |
1296 	__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
1298 	val64 |= XGE_HAL_MDIO_CONTROL_MMD_CTRL(XGE_HAL_MDIO_CTRL_START);
1299 	__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
1303 	    val64 = __hal_serial_mem_read64(hldev, &bar0->mdio_control);
1308 	} while((val64 & XGE_HAL_MDIO_CONTROL_MMD_CTRL(0xF)) !=
1313 	val64 = 0x0;
1315 	val64 = XGE_HAL_MDIO_CONTROL_MMD_INDX_ADDR(addr)    |
1320 	__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
1322 	val64 |= XGE_HAL_MDIO_CONTROL_MMD_CTRL(XGE_HAL_MDIO_CTRL_START);
1323 	__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
1329 	    val64 = __hal_serial_mem_read64(hldev, &bar0->mdio_control);
1334 	}while((val64 & XGE_HAL_MDIO_CONTROL_MMD_CTRL(0xF)) != XGE_HAL_MDIO_CONTROL_MMD_CTRL(1));
1465 	u64 val64;
1467 	val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
1469 	if (val64 & XGE_HAL_ADAPTER_STATUS_RMAC_LOCAL_FAULT)
1490 	u64 val64;
1492 	val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
1494 	if (val64 & XGE_HAL_RMAC_PAUSE_GEN_EN)
1496 	if (val64 & XGE_HAL_RMAC_PAUSE_RCV_EN)
1518 	u64 val64;
1520 	val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
1523 	    val64 |= XGE_HAL_RMAC_PAUSE_GEN_EN;
1525 	    val64 &= ~XGE_HAL_RMAC_PAUSE_GEN_EN;
1527 	    val64 |= XGE_HAL_RMAC_PAUSE_RCV_EN;
1529 	    val64 &= ~XGE_HAL_RMAC_PAUSE_RCV_EN;
1531 	             val64, &bar0->rmac_pause_cfg);