Lines Matching defs:val64
130 u64 val64;
137 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0, reg);
138 if (op == 0 && !(val64 & mask))
140 else if (op == 1 && (val64 & mask) == mask)
146 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0, reg);
147 if (op == 0 && !(val64 & mask))
149 else if (op == 1 && (val64 & mask) == mask)
244 u64 val64;
268 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
270 val64 |= 0x0000800000000000ULL;
272 val64, &bar0->beacon_control);
273 val64 = 0x0411040400000000ULL;
274 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
350 u64 val64;
352 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
354 val64 |= XGE_HAL_MAC_RMAC_BCAST_ENABLE;
360 (u32)(val64 >> 32), &bar0->mac_cfg);
363 (unsigned long long)val64,
380 u64 val64;
382 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
385 val64 &= ~(XGE_HAL_MAC_RMAC_BCAST_ENABLE);
390 (u32)(val64 >> 32), &bar0->mac_cfg);
393 (unsigned long long)val64,
408 u64 val64;
410 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
412 val64 |=
414 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
430 u64 val64;
434 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
436 val64 &= ( ~XGE_HAL_MAC_RMAC_ALL_ADDR_ENABLE );
437 val64 &= ( ~XGE_HAL_MAC_CFG_RMAC_PROM_ENABLE );
438 val64 |= XGE_HAL_MAC_CFG_TMAC_APPEND_PAD;
446 val64 |= XGE_HAL_MAC_CFG_RMAC_STRIP_FCS;
449 val64 &= ( ~XGE_HAL_MAC_CFG_RMAC_STRIP_PAD );
450 val64 |= XGE_HAL_MAC_RMAC_DISCARD_PFRM;
453 (u32)(val64 >> 32), (char*)&bar0->mac_cfg);
458 (unsigned long long)val64);
476 u64 val64;
481 val64=0xfffbfffbfffbfffbULL;
485 val64=0xffbbffbbffbbffbbULL;
490 val64=0xffbbffbbffbbffbbULL;
495 val64, &bar0->mc_pause_thresh_q0q3);
497 val64, &bar0->mc_pause_thresh_q4q7);
501 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
504 val64 |= XGE_HAL_RMAC_PAUSE_GEN_EN;
506 val64 &= ~(XGE_HAL_RMAC_PAUSE_GEN_EN);
508 val64 |= XGE_HAL_RMAC_PAUSE_RCV_EN;
510 val64 &= ~(XGE_HAL_RMAC_PAUSE_RCV_EN);
511 val64 &= ~(XGE_HAL_RMAC_PAUSE_HG_PTIME(0xffff));
512 val64 |= XGE_HAL_RMAC_PAUSE_HG_PTIME(hldev->config.mac.rmac_pause_time);
513 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
516 val64 = 0;
518 val64 |=
522 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
525 val64 = 0;
527 val64 |=
531 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
611 u64 val64 = 0, temp64 = 0;
621 val64 = XGE_HAL_TXPIC_INT_M/* | XGE_HAL_PIC_RX_INT_M*/;
623 gim &= ~((u64) val64);
678 gim |= val64;
686 val64 = XGE_HAL_TXDMA_INT_M;
688 gim &= ~((u64) val64);
718 gim |= val64;
725 val64 = XGE_HAL_RXDMA_INT_M;
728 gim &= ~((u64) val64);
743 gim |= val64;
750 val64 = XGE_HAL_TXMAC_INT_M | XGE_HAL_RXMAC_INT_M;
753 gim &= ~((u64) val64);
770 gim |= val64;
776 val64 = XGE_HAL_TXXGXS_INT_M | XGE_HAL_RXXGXS_INT_M;
779 gim &= ~((u64) val64);
791 gim |= val64;
797 val64 = XGE_HAL_MC_INT_M;
800 gim &= ~((u64) val64);
813 gim |= val64;
820 val64 = XGE_HAL_TXTRAFFIC_INT_M;
823 gim &= ~((u64) val64);
837 gim |= val64;
843 val64 = XGE_HAL_RXTRAFFIC_INT_M;
845 gim &= ~((u64) val64);
859 gim |= val64;
952 u64 val64, data1 = 0, data2 = 0;
1014 val64 = XGE_HAL_TTI_CMD_MEM_WE | XGE_HAL_TTI_CMD_MEM_STROBE_NEW_CMD |
1016 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
1102 u64 val64, data1 = 0, data2 = 0;
1171 val64 = XGE_HAL_RTI_CMD_MEM_WE |
1173 val64 |= XGE_HAL_RTI_CMD_MEM_OFFSET(i);
1174 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
1281 u64 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
1284 return val64;
1359 u64 val64;
1361 val64 = XGE_HAL_MAC_TX_LINK_UTIL_VAL(
1365 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
1382 u64 val64;
1407 val64 = XGE_HAL_CUSTOM_HW_SWAPPER;
1410 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
1414 (unsigned long long)val64);
1429 val64 = (XGE_HAL_SWAPPER_CTRL_PIF_R_FE |
1452 val64 |= XGE_HAL_SWAPPER_CTRL_XMSI_SE;
1454 __hal_pio_mem_write32_lower(hldev->pdev, hldev->regh0, (u32)val64,
1457 __hal_pio_mem_write32_upper(hldev->pdev, hldev->regh0, (u32)(val64>>32),
1460 __hal_pio_mem_write32_upper(hldev->pdev, hldev->regh0, (u32)(val64>>32),
1467 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
1469 if (val64 != XGE_HAL_IF_RD_SWAPPER_FB) {
1471 (unsigned long long) val64);
1490 u64 val64;
1500 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
1502 val64 |= XGE_HAL_RTS_CTRL_ENHANCED_MODE;
1504 val64, &bar0->rts_ctrl);
1518 u64 val64;
1529 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
1531 val64 |= XGE_HAL_RTS_CTRL_ENHANCED_MODE;
1533 val64, &bar0->rts_ctrl);
1559 val64 = BIT(7) | BIT(15);
1565 val64 = vBIT(port->num,8,16) |
1568 val64 = BIT(47);
1570 val64 = BIT(7);
1572 hldev->regh0, val64,
1575 val64 = BIT(7) | BIT(15) | vBIT(pnum,24,8);
1579 val64, &bar0->rts_pn_cam_ctrl);
1605 u64 val64;
1613 val64 = 0;
1617 val64 = XGE_HAL_RTS_DS_MEM_DATA(0);
1619 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
1622 val64 = XGE_HAL_RTS_DS_MEM_CTRL_WE |
1626 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
1649 val64 = 0x0;
1650 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
1651 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
1652 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
1653 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
1654 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
1657 val64 = 0x0001000100010001ULL;
1658 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
1659 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
1660 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
1661 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
1662 val64 = 0x0001000100000000ULL;
1663 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
1666 val64 = 0x0001020001020001ULL;
1667 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
1668 val64 = 0x0200010200010200ULL;
1669 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
1670 val64 = 0x0102000102000102ULL;
1671 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
1672 val64 = 0x0001020001020001ULL;
1673 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
1674 val64 = 0x0200010200000000ULL;
1675 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
1678 val64 = 0x0001020300010203ULL;
1679 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
1680 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
1681 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
1682 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
1683 val64 = 0x0001020300000000ULL;
1684 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
1687 val64 = 0x0001020304000102ULL;
1688 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
1689 val64 = 0x0304000102030400ULL;
1690 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
1691 val64 = 0x0102030400010203ULL;
1692 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
1693 val64 = 0x0400010203040001ULL;
1694 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
1695 val64 = 0x0203040000000000ULL;
1696 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
1699 val64 = 0x0001020304050001ULL;
1700 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
1701 val64 = 0x0203040500010203ULL;
1702 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
1703 val64 = 0x0405000102030405ULL;
1704 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
1705 val64 = 0x0001020304050001ULL;
1706 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
1707 val64 = 0x0203040500000000ULL;
1708 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
1711 val64 = 0x0001020304050600ULL;
1712 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
1713 val64 = 0x0102030405060001ULL;
1714 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
1715 val64 = 0x0203040506000102ULL;
1716 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
1717 val64 = 0x0304050600010203ULL;
1718 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
1719 val64 = 0x0405060000000000ULL;
1720 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
1723 val64 = 0x0001020304050607ULL;
1724 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
1725 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
1726 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
1727 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
1728 val64 = 0x0001020300000000ULL;
1729 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
1832 u64 val64;
1847 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
1849 val64 |= XGE_HAL_RTS_CTRL_ENHANCED_MODE;
1851 val64, &bar0->rts_ctrl);
1870 val64 = XGE_HAL_RTS_RTH_MAP_MEM_DATA_ENTRY_EN |
1872 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
1876 val64 = XGE_HAL_RTS_RTH_MAP_MEM_CTRL_WE |
1879 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
1893 val64 = XGE_HAL_RTS_RTH_EN;
1894 val64 |= XGE_HAL_RTS_RTH_BUCKET_SIZE(hldev->config.rth_bucket_size);
1895 val64 |= XGE_HAL_RTS_RTH_TCP_IPV4_EN | XGE_HAL_RTS_RTH_UDP_IPV4_EN | XGE_HAL_RTS_RTH_IPV4_EN |
1899 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
1927 u64 val64;
1934 val64 = XGE_HAL_RX_PIC_INT_REG_SPDM_READY;
1935 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
2020 u64 val64;
2033 val64 = xge_os_pio_mem_read64(hldev->pdev,
2036 spdm_bar_num = XGE_HAL_SPDM_PCI_BAR_NUM(val64);
2037 spdm_bar_offset = XGE_HAL_SPDM_PCI_BAR_OFFSET(val64);
2065 val64 = xge_os_pio_mem_read64(hldev->pdev,
2067 hldev->spdm_max_entries = XGE_HAL_SPDM_MAX_ENTRIES(val64);
2138 val64 = xge_os_pio_mem_read64(hldev->pdev,
2140 val64 |= XGE_HAL_RTS_CTRL_ENHANCED_MODE;
2142 val64, &bar0->rts_ctrl);
2161 val64 = XGE_HAL_RTH_STATUS_SPDM_USE_L4;
2163 val64, &bar0->rts_rth_status);
2166 val64 = XGE_HAL_RTS_RTH_EN;
2167 val64 |= XGE_HAL_RTS_RTH_IPV4_EN | XGE_HAL_RTS_RTH_TCP_IPV4_EN;
2168 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
2447 u64 val64;
2455 val64 = xge_os_pio_mem_read64(
2458 val64 |= XGE_HAL_MISC_INT_REG_LINK_UP_INT;
2459 val64 &= ~XGE_HAL_MISC_INT_REG_LINK_DOWN_INT;
2461 val64, &bar0->misc_int_mask);
2470 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
2472 val64 |= XGE_HAL_ADAPTER_CNTL_EN;
2473 val64 = val64 & (~XGE_HAL_ADAPTER_ECC_EN); /* ECC enable */
2474 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
2478 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
2480 val64 = val64|(XGE_HAL_ADAPTER_EOI_TX_ON |
2482 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
2487 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
2489 if (val64 & (XGE_HAL_ADAPTER_STATUS_RMAC_REMOTE_FAULT |
2500 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
2502 val64 |= XGE_HAL_MISC_INT_REG_LINK_UP_INT;
2503 val64 &= ~XGE_HAL_MISC_INT_REG_LINK_DOWN_INT;
2504 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
2548 u64 val64;
2556 val64 = xge_os_pio_mem_read64(
2559 val64 |= XGE_HAL_MISC_INT_REG_LINK_DOWN_INT;
2560 val64 &= ~XGE_HAL_MISC_INT_REG_LINK_UP_INT;
2562 val64, &bar0->misc_int_mask);
2571 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
2575 if (val64 & XGE_HAL_ADAPTER_CNTL_EN) {
2586 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
2589 val64 = val64 & (~XGE_HAL_ADAPTER_LED_ON);
2590 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
2599 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
2601 val64 |= XGE_HAL_MISC_INT_REG_LINK_DOWN_INT;
2602 val64 &= ~XGE_HAL_MISC_INT_REG_LINK_UP_INT;
2603 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
2643 u64 val64;
2646 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
2652 if ( !(val64 & XGE_HAL_ADAPTER_CNTL_EN) &&
2766 u64 val64;
2796 val64 = XGE_HAL_TXREQTO_VAL(0x1FF);
2797 val64 |= XGE_HAL_TXREQTO_EN;
2798 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
2815 val64 = XGE_HAL_TXREQTO_VAL(0x7F);
2816 val64 |= XGE_HAL_TXREQTO_EN;
2817 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
2833 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
2835 val64 &= ~XGE_HAL_TXD_WRITE_BC(0x2);
2836 val64 |= XGE_HAL_TXD_WRITE_BC(0x4);
2837 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
2881 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
2884 val64 |= XGE_HAL_MISC_CONTROL_EXT_REQ_EN;
2887 val64, &bar0->misc_control);
2890 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
2893 val64 |= XGE_HAL_MISC_CONTROL_LINK_FAULT;
2896 val64, &bar0->misc_control);
2990 if (__hal_device_wait_quiescent(hldev, &val64)) {
3010 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
3012 val64 &= ~(XGE_HAL_PIC_CNTL_ONE_SHOT_TINT);
3013 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
3035 u64 val64, rawval = 0ULL;
3052 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
3054 swap_done = (val64 == XGE_HAL_IF_RD_SWAPPER_FB);
3109 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
3111 if (val64 != rawval) {
3146 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
3149 if (val64 != rawval) {
3152 (unsigned long long)val64, (unsigned long long)rawval);
3477 u64 val64;
3479 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
3481 if (!(val64 & XGE_HAL_MC_INT_STATUS_MC_INT))
3484 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
3487 val64, &isrbar0->mc_err_reg);
3489 if (val64 & XGE_HAL_MC_ERR_REG_ETQ_ECC_SG_ERR_L ||
3490 val64 & XGE_HAL_MC_ERR_REG_ETQ_ECC_SG_ERR_U ||
3491 val64 & XGE_HAL_MC_ERR_REG_MIRI_ECC_SG_ERR_0 ||
3492 val64 & XGE_HAL_MC_ERR_REG_MIRI_ECC_SG_ERR_1 ||
3494 (val64 & XGE_HAL_MC_ERR_REG_ITQ_ECC_SG_ERR_L ||
3495 val64 & XGE_HAL_MC_ERR_REG_ITQ_ECC_SG_ERR_U ||
3496 val64 & XGE_HAL_MC_ERR_REG_RLD_ECC_SG_ERR_L ||
3497 val64 & XGE_HAL_MC_ERR_REG_RLD_ECC_SG_ERR_U))) {
3502 if (val64 & XGE_HAL_MC_ERR_REG_ETQ_ECC_DB_ERR_L ||
3503 val64 & XGE_HAL_MC_ERR_REG_ETQ_ECC_DB_ERR_U ||
3504 val64 & XGE_HAL_MC_ERR_REG_MIRI_ECC_DB_ERR_0 ||
3505 val64 & XGE_HAL_MC_ERR_REG_MIRI_ECC_DB_ERR_1 ||
3507 (val64 & XGE_HAL_MC_ERR_REG_ITQ_ECC_DB_ERR_L ||
3508 val64 & XGE_HAL_MC_ERR_REG_ITQ_ECC_DB_ERR_U ||
3509 val64 & XGE_HAL_MC_ERR_REG_RLD_ECC_DB_ERR_L ||
3510 val64 & XGE_HAL_MC_ERR_REG_RLD_ECC_DB_ERR_U))) {
3515 if (val64 & XGE_HAL_MC_ERR_REG_SM_ERR) {
3520 if (val64 & XGE_HAL_MC_ERR_REG_MIRI_ECC_DB_ERR_0 ||
3521 val64 & XGE_HAL_MC_ERR_REG_MIRI_ECC_DB_ERR_1) {
3522 __hal_device_handle_eccerr(hldev, "mc_err_reg", val64);
3539 u64 val64;
3542 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
3545 val64, &isrbar0->flsh_int_reg);
3549 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
3552 val64, &isrbar0->mdio_int_reg);
3556 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
3559 val64, &isrbar0->iic_int_reg);
3563 val64 = xge_os_pio_mem_read64(hldev->pdev,
3570 if ((val64 & XGE_HAL_MISC_INT_REG_LINK_UP_INT) &&
3571 (val64 & XGE_HAL_MISC_INT_REG_LINK_DOWN_INT)) {
3576 (unsigned long long)val64);
3584 else if (val64 & XGE_HAL_MISC_INT_REG_LINK_UP_INT) {
3587 (unsigned long long)val64);
3590 else if (val64 & XGE_HAL_MISC_INT_REG_LINK_DOWN_INT){
3593 (unsigned long long)val64);
3600 val64, &isrbar0->misc_int_reg);
3618 volatile u64 val64;
3620 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
3622 if ( val64 & (XGE_HAL_PIC_INT_FLSH |
3626 status = __hal_device_handle_pic(hldev, val64);
3630 if (!(val64 & XGE_HAL_PIC_INT_TX))
3633 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
3636 val64, &isrbar0->txpic_int_reg);
3639 if (val64 & XGE_HAL_TXPIC_INT_SCHED_INTR) {
3698 u64 val64, temp64, err;
3700 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
3702 if (val64 & XGE_HAL_TXDMA_PFC_INT) {
3711 if (val64 & temp64)
3714 if (val64 & XGE_HAL_TXDMA_TDA_INT) {
3722 if (val64 & temp64)
3725 if (val64 & XGE_HAL_TXDMA_PCC_INT) {
3736 if (val64 & temp64)
3739 if (val64 & XGE_HAL_TXDMA_TTI_INT) {
3746 if (val64 & temp64)
3749 if (val64 & XGE_HAL_TXDMA_LSO_INT) {
3757 if (val64 & temp64)
3760 if (val64 & XGE_HAL_TXDMA_TPA_INT) {
3767 if (val64 & temp64)
3770 if (val64 & XGE_HAL_TXDMA_SM_INT) {
3777 if (val64 & temp64)
3799 u64 val64, temp64;
3801 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
3803 if (!(val64 & XGE_HAL_MAC_INT_STATUS_TMAC_INT))
3806 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
3809 val64, &isrbar0->mac_tmac_err_reg);
3812 if (val64 & temp64) {
3831 u64 val64, temp64;
3833 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
3835 if (!(val64 & XGE_HAL_XGXS_INT_STATUS_TXGXS))
3838 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
3841 val64, &isrbar0->xgxs_txgxs_err_reg);
3844 if (val64 & temp64) {
3876 u64 val64, err, temp64;
3878 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
3880 if (val64 & XGE_HAL_RXDMA_RC_INT) {
3889 if (val64 & temp64)
3892 if (val64 & XGE_HAL_RXDMA_RPA_INT) {
3899 if (val64 & temp64)
3902 if (val64 & XGE_HAL_RXDMA_RDA_INT) {
3912 if (val64 & temp64)
3915 if (val64 & XGE_HAL_RXDMA_RTI_INT) {
3922 if (val64 & temp64)
3944 u64 val64, temp64;
3946 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
3948 if (!(val64 & XGE_HAL_MAC_INT_STATUS_RMAC_INT))
3951 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
3954 val64, &isrbar0->mac_rmac_err_reg);
3957 if (val64 & temp64) {
3976 u64 val64, temp64;
3978 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
3980 if (!(val64 & XGE_HAL_XGXS_INT_STATUS_RXGXS))
3983 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
3986 val64, &isrbar0->xgxs_rxgxs_err_reg);
3989 if (val64 & temp64) {
4015 u64 val64;
4042 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
4047 val64 |= XGE_HAL_MISC_CONTROL_LINK_STABILITY_PERIOD(
4053 val64 |= XGE_HAL_MISC_CONTROL_LINK_STABILITY_PERIOD(
4057 val64, &bar0->misc_control);
4063 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
4065 if (val64) {
4067 val64, &bar0->misc_int_reg);
4075 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
4077 if (val64) {
4079 val64, &bar0->mac_rmac_err_reg);
4084 if (__hal_device_wait_quiescent(hldev, &val64)) {
4089 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
4091 val64 |= XGE_HAL_ADAPTER_EOI_TX_ON;
4092 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
4102 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
4104 if( val64 & (XGE_HAL_ADAPTER_STATUS_RMAC_REMOTE_FAULT |
4106 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
4108 val64 = val64 & (~XGE_HAL_ADAPTER_LED_ON);
4110 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
4112 val64 = val64 | ( XGE_HAL_ADAPTER_EOI_TX_ON |
4116 val64 = val64 | XGE_HAL_ADAPTER_CNTL_EN; /* adapter enable */
4117 val64 = val64 & (~XGE_HAL_ADAPTER_ECC_EN); /* ECC enable */
4118 xge_os_pio_mem_write64 (hldev->pdev, hldev->regh0, val64,
4131 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
4135 (val64 & XGE_HAL_ADAPTER_CNTL_EN)) {
4150 val64 = xge_os_pio_mem_read64(
4154 val64 = val64|
4158 hldev->regh0, val64,
4162 val64 = xge_os_pio_mem_read64(
4175 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
4177 val64 = val64 | XGE_HAL_ADAPTER_EOI_TX_ON;
4179 val64, &bar0->adapter_control);
4185 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
4187 val64 |= XGE_HAL_ADAPTER_CNTL_EN;
4188 val64 = val64 & (~XGE_HAL_ADAPTER_ECC_EN);/*ECC enable*/
4189 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
4279 u64 val64;
4283 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
4285 val64 = val64 & (~XGE_HAL_ADAPTER_CNTL_EN);
4286 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
4289 if (__hal_device_wait_quiescent(hldev, &val64) != XGE_HAL_OK) {
4458 u64 val64;
4461 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
4465 val64 &= ~(1LL << ( 63 - channel->msix_idx ));
4467 val64 |= (1LL << ( 63 - channel->msix_idx ));
4468 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
4487 u64 val64;
4508 val64 = 0;
4510 val64 = XGE_HAL_TX_TRAFFIC_INTR;
4513 val64 |= XGE_HAL_RX_TRAFFIC_INTR;
4516 val64 |= XGE_HAL_RX_TRAFFIC_INTR;
4518 val64 |=XGE_HAL_TX_PIC_INTR |
4523 __hal_device_intr_mgmt(hldev, val64, 1);
4587 u64 val64;
4641 val64 = 0;
4643 val64 = XGE_HAL_TX_TRAFFIC_INTR;
4645 val64 |= XGE_HAL_RX_TRAFFIC_INTR |
4650 __hal_device_intr_mgmt(hldev, val64, 0);
4682 u64 val64;
4706 val64 = XGE_HAL_RMAC_ADDR_CMD_MEM_WE |
4709 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
4737 u64 val64;
4762 val64 = XGE_HAL_RMAC_ADDR_CMD_MEM_WE |
4765 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
4790 u64 val64;
4799 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
4801 val64 |= XGE_HAL_MAC_CFG_RMAC_PROM_ENABLE;
4808 (u32)(val64 >> 32),
4814 (unsigned long long)val64);
4829 u64 val64;
4838 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
4840 val64 &= ~XGE_HAL_MAC_CFG_RMAC_PROM_ENABLE;
4847 (u32)(val64 >> 32),
4853 (unsigned long long)val64);
4881 u64 val64;
4899 val64 = XGE_HAL_RMAC_ADDR_CMD_MEM_RD |
4902 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
4913 val64 = ( XGE_HAL_RMAC_ADDR_CMD_MEM_RD |
4916 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
4926 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
4929 (*macaddr)[i] = (u8)(val64 >> ((64 - 8) - (i * 8)));
4967 u64 val64, temp64;
4988 val64 = ( XGE_HAL_RMAC_ADDR_CMD_MEM_WE |
4992 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
5669 u64 val64;
5673 val64 = xge_os_pio_mem_read64(hldev->pdev,
5677 val64 = val64 & (~XGE_HAL_ADAPTER_LED_ON);
5679 hldev->regh0, val64,
5758 u64 val64;
5766 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
5769 val64 &= XGE_HAL_SCHED_INT_PERIOD_MASK;
5770 val64 |= XGE_HAL_SCHED_INT_PERIOD(interval);
5772 val64 |= XGE_HAL_SCHED_INT_CTRL_ONE_SHOT;
5774 val64 |= XGE_HAL_SCHED_INT_CTRL_TIMER_EN;
5776 val64 &= ~XGE_HAL_SCHED_INT_CTRL_TIMER_EN;
5780 val64, &bar0->scheduled_int_ctrl);
5783 (unsigned long long)val64,
5893 u64 val64;
5895 val64 = XGE_HAL_RTS_RTH_SPDM_MEM_CTRL_STROBE |
5899 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
6081 u64 val64;
6154 val64 = xge_os_pio_mem_read64(hldev->pdev,
6157 jhash_golden_ratio = (u32)(val64 >> 32);
6158 jhash_init_val = (u32)(val64 & 0xffffffff);
6222 u64 val64;
6254 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
6256 val64 &= ~XGE_HAL_RX_PIC_INT_REG_SPDM_READY;
6257 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
6456 u64 val64;
6462 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
6464 val64 &= ~BIT(ring_qid);
6466 hldev->regh0, val64,
6482 u64 val64;
6488 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
6490 val64 &= ~BIT(fifo_qid);
6492 hldev->regh0, val64,
6513 u64 val64;
6520 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
6522 val64 |= XGE_HAL_SET_RX_MAT(ring, msi);
6523 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
6530 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
6532 val64 |= XGE_HAL_SET_TX_MAT(fifo, msi);
6533 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
6623 u64 val64;
6625 val64 = XGE_HAL_XMSI_NO(msix_idx) | XGE_HAL_XMSI_STROBE;
6627 (u32)(val64 >> 32), &bar0->xmsi_access);
6629 (u32)(val64), &bar0->xmsi_access);
6631 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
6633 if (val64 & XGE_HAL_XMSI_STROBE)
6660 u64 val64;
6665 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
6667 val64 |= XGE_HAL_SET_RX_MAT(ring, msix_idx);
6668 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
6675 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
6677 val64 |= XGE_HAL_SET_TX_MAT(fifo, msix_idx);
6678 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
6850 u64 val64 = *((u64*)item_data);
6859 val64);
6915 u64 val64;
6921 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
6923 val64 |= XGE_HAL_RTS_CTRL_ENHANCED_MODE;
6925 val64, &bar0->rts_ctrl);
6942 u64 val64;
6948 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
6950 val64 &= ~XGE_HAL_RTS_CTRL_ENHANCED_MODE;
6952 val64, &bar0->rts_ctrl);
6953 val64 = 0;
6954 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
6977 u64 val64;
6979 val64 = XGE_HAL_RTS_DEFAULT_Q(def_q);
6980 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
6983 val64 = hash_type;
6984 val64 |= XGE_HAL_RTS_RTH_EN;
6985 val64 |= XGE_HAL_RTS_RTH_BUCKET_SIZE(bucket_size);
6986 val64 |= XGE_HAL_RTS_RTH_ALG_SEL_MS;
6987 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
7003 u64 val64;
7006 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
7008 val64 |= XGE_HAL_RTS_RTH_EN;
7009 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
7025 u64 val64;
7027 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
7029 val64 &= ~XGE_HAL_RTS_RTH_EN;
7030 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
7050 u64 val64;
7054 val64 = XGE_HAL_RTS_RTH_MAP_MEM_DATA_ENTRY_EN |
7057 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
7061 val64 = (XGE_HAL_RTS_RTH_MAP_MEM_CTRL_WE |
7064 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
7096 u64 val64;
7103 val64 = 0;
7107 val64 <<= 8;
7108 val64 |= Key[entry++];
7113 /* temp64 = XGE_HAL_RTH_HASH_MASK_n(val64, (n<<3), (n<<3)+7);*/
7114 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
7120 val64 = 0;
7121 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
7147 u64 val64;
7167 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
7172 val64 |= XGE_HAL_RTS_MAC_SECT0_EN;
7175 val64 |= XGE_HAL_RTS_MAC_SECT1_EN;
7178 val64 |= XGE_HAL_RTS_MAC_SECT2_EN;
7181 val64 |= XGE_HAL_RTS_MAC_SECT3_EN;
7184 val64 |= XGE_HAL_RTS_MAC_SECT4_EN;
7187 val64 |= XGE_HAL_RTS_MAC_SECT5_EN;
7190 val64 |= XGE_HAL_RTS_MAC_SECT6_EN;
7193 val64 |= XGE_HAL_RTS_MAC_SECT7_EN;
7201 val64, &bar0->rts_mac_cfg);
7220 u64 val64;
7223 val64 = XGE_HAL_MC_RLDRAM_TEST_MODE;
7224 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
7228 val64 = 0x0100000000000000ULL;
7229 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
7233 val64 = 0x0000000000017B00ULL;
7234 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
7238 val64 = 0x0000000001017B00ULL;
7239 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
7243 val64 = 0x00000000001E0100ULL;
7244 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
7247 val64 = 0x00000100001F0100ULL;
7248 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
7251 val64 = 0x0001000000010000ULL;
7252 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,
7262 val64 = 0x0000000000000000ULL;
7263 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64,