Lines Matching defs:mh

59 	pCmd = (_type *)&mh->mh_cmdbuf[0];				\
66 malo_hal_read4(struct malo_hal *mh, bus_size_t off)
68 return bus_space_read_4(mh->mh_iot, mh->mh_ioh, off);
72 malo_hal_write4(struct malo_hal *mh, bus_size_t off, uint32_t val)
74 bus_space_write_4(mh->mh_iot, mh->mh_ioh, off, val);
99 struct malo_hal *mh;
101 mh = malloc(sizeof(struct malo_hal), M_DEVBUF, M_NOWAIT | M_ZERO);
102 if (mh == NULL)
105 mh->mh_dev = dev;
106 mh->mh_ioh = ioh;
107 mh->mh_iot = iot;
109 snprintf(mh->mh_mtxname, sizeof(mh->mh_mtxname),
111 mtx_init(&mh->mh_mtx, mh->mh_mtxname, NULL, MTX_DEF);
129 &mh->mh_dmat);
137 error = bus_dmamap_create(mh->mh_dmat, BUS_DMA_NOWAIT, &mh->mh_dmamap);
144 error = bus_dmamem_alloc(mh->mh_dmat, (void**) &mh->mh_cmdbuf,
146 &mh->mh_dmamap);
153 error = bus_dmamap_load(mh->mh_dmat, mh->mh_dmamap,
154 mh->mh_cmdbuf, MALO_CMDBUF_SIZE,
155 malo_hal_load_cb, &mh->mh_cmdaddr,
163 return (mh);
166 if (mh->mh_dmamap != NULL) {
167 bus_dmamap_unload(mh->mh_dmat, mh->mh_dmamap);
168 if (mh->mh_cmdbuf != NULL)
169 bus_dmamem_free(mh->mh_dmat, mh->mh_cmdbuf,
170 mh->mh_dmamap);
171 bus_dmamap_destroy(mh->mh_dmat, mh->mh_dmamap);
173 if (mh->mh_dmat)
174 bus_dma_tag_destroy(mh->mh_dmat);
175 free(mh, M_DEVBUF);
185 malo_hal_send_cmd(struct malo_hal *mh)
189 bus_dmamap_sync(mh->mh_dmat, mh->mh_dmamap,
192 malo_hal_write4(mh, MALO_REG_GEN_PTR, mh->mh_cmdaddr);
193 dummy = malo_hal_read4(mh, MALO_REG_INT_CODE);
195 malo_hal_write4(mh, MALO_REG_H2A_INTERRUPT_EVENTS,
200 malo_hal_waitforcmd(struct malo_hal *mh, uint16_t cmd)
206 if (mh->mh_cmdbuf[0] == le16toh(cmd))
217 malo_hal_execute_cmd(struct malo_hal *mh, unsigned short cmd)
219 MALO_HAL_LOCK_ASSERT(mh);
221 if ((mh->mh_flags & MHF_FWHANG) &&
222 (mh->mh_debug & MALO_HAL_DEBUG_IGNHANG) == 0) {
223 device_printf(mh->mh_dev, "firmware hung, skipping cmd 0x%x\n",
228 if (malo_hal_read4(mh, MALO_REG_INT_CODE) == 0xffffffff) {
229 device_printf(mh->mh_dev, "%s: device not present!\n",
234 malo_hal_send_cmd(mh);
235 if (!malo_hal_waitforcmd(mh, cmd | 0x8000)) {
236 device_printf(mh->mh_dev,
238 mh->mh_flags |= MHF_FWHANG;
242 bus_dmamap_sync(mh->mh_dmat, mh->mh_dmamap,
249 malo_hal_get_cal_table(struct malo_hal *mh, uint8_t annex, uint8_t index)
254 MALO_HAL_LOCK_ASSERT(mh);
260 ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_GET_CALTABLE);
267 malo_hal_get_pwrcal_table(struct malo_hal *mh, struct malo_hal_caldata *cal)
272 MALO_HAL_LOCK(mh);
274 data = ((const struct malo_cmd_caltable *) mh->mh_cmdbuf)->caltbl;
275 if (malo_hal_get_cal_table(mh, 33, 0) == 0) {
280 mh->mh_flags |= MHF_CALDATA;
281 MALO_HAL_UNLOCK(mh);
290 malo_hal_resetstate(struct malo_hal *mh)
296 if ((mh->mh_flags & MHF_CALDATA) == 0)
297 malo_hal_get_pwrcal_table(mh, &mh->mh_caldata);
302 malo_hal_fw_reset(struct malo_hal *mh)
305 if (malo_hal_read4(mh, MALO_REG_INT_CODE) == 0xffffffff) {
306 device_printf(mh->mh_dev, "%s: device not present!\n",
311 malo_hal_write4(mh, MALO_REG_H2A_INTERRUPT_EVENTS, MALO_ISR_RESET);
312 mh->mh_flags &= ~MHF_FWHANG;
316 malo_hal_trigger_pcicmd(struct malo_hal *mh)
320 bus_dmamap_sync(mh->mh_dmat, mh->mh_dmamap, BUS_DMASYNC_PREWRITE);
322 malo_hal_write4(mh, MALO_REG_GEN_PTR, mh->mh_cmdaddr);
323 dummy = malo_hal_read4(mh, MALO_REG_INT_CODE);
325 malo_hal_write4(mh, MALO_REG_INT_CODE, 0x00);
326 dummy = malo_hal_read4(mh, MALO_REG_INT_CODE);
328 malo_hal_write4(mh, MALO_REG_H2A_INTERRUPT_EVENTS,
330 dummy = malo_hal_read4(mh, MALO_REG_INT_CODE);
334 malo_hal_waitfor(struct malo_hal *mh, uint32_t val)
340 if (malo_hal_read4(mh, MALO_REG_INT_CODE) == val)
351 malo_hal_send_helper(struct malo_hal *mh, int bsize,
354 mh->mh_cmdbuf[0] = htole16(MALO_HOSTCMD_CODE_DNLD);
355 mh->mh_cmdbuf[1] = htole16(bsize);
356 memcpy(&mh->mh_cmdbuf[4], data , dsize);
358 malo_hal_trigger_pcicmd(mh);
364 if (malo_hal_waitfor(mh, MALO_INT_CODE_CMD_FINISHED) != 0) {
365 device_printf(mh->mh_dev,
367 __func__, malo_hal_read4(mh, MALO_REG_INT_CODE));
373 malo_hal_write4(mh, MALO_REG_INT_CODE, 0);
379 malo_hal_fwload_helper(struct malo_hal *mh, char *helper)
386 device_printf(mh->mh_dev, "could not read microcode %s!\n",
391 device_printf(mh->mh_dev, "load %s firmware image (%zu bytes)\n",
394 error = malo_hal_send_helper(mh, fw->datasize, fw->data, fw->datasize,
400 error = malo_hal_send_helper(mh, 0, NULL, 0, MALO_NOWAIT);
412 malo_hal_send_main(struct malo_hal *mh, const void *data, size_t dsize,
415 mh->mh_cmdbuf[0] = htole16(MALO_HOSTCMD_CODE_DNLD);
416 mh->mh_cmdbuf[1] = htole16(dsize);
417 mh->mh_cmdbuf[2] = htole16(seqnum);
418 mh->mh_cmdbuf[3] = 0;
419 memcpy(&mh->mh_cmdbuf[4], data, dsize);
421 malo_hal_trigger_pcicmd(mh);
426 if (malo_hal_waitfor(mh, MALO_INT_CODE_CMD_FINISHED) != 0) {
427 device_printf(mh->mh_dev,
429 __func__, malo_hal_read4(mh, MALO_REG_INT_CODE));
435 malo_hal_write4(mh, MALO_REG_INT_CODE, 0);
441 malo_hal_fwload_main(struct malo_hal *mh, char *firmware)
454 device_printf(mh->mh_dev, "could not read firmware %s!\n",
459 device_printf(mh->mh_dev, "load %s firmware image (%zu bytes)\n",
467 error = malo_hal_send_main(mh, fp, blocksize, seqnum++,
478 error = malo_hal_send_main(mh, NULL, 0, seqnum++, MALO_NOWAIT);
488 malo_hal_fwload(struct malo_hal *mh, char *helper, char *firmware)
500 malo_hal_fw_reset(mh);
502 malo_hal_write4(mh, MALO_REG_A2H_INTERRUPT_CLEAR_SEL,
504 malo_hal_write4(mh, MALO_REG_A2H_INTERRUPT_CAUSE, 0x00);
505 malo_hal_write4(mh, MALO_REG_A2H_INTERRUPT_MASK, 0x00);
506 malo_hal_write4(mh, MALO_REG_A2H_INTERRUPT_STATUS_MASK,
509 error = malo_hal_fwload_helper(mh, helper);
511 device_printf(mh->mh_dev, "failed to load bootrom loader.\n");
517 error = malo_hal_fwload_main(mh, firmware);
519 device_printf(mh->mh_dev, "failed to load firmware.\n");
527 mh->mh_cmdbuf[1] = 0;
530 malo_hal_trigger_pcicmd(mh);
533 malo_hal_write4(mh, MALO_REG_GEN_PTR, opmode);
535 if (malo_hal_read4(mh, MALO_REG_INT_CODE) == fwreadysig) {
536 malo_hal_write4(mh, MALO_REG_INT_CODE, 0x00);
537 return malo_hal_resetstate(mh);
543 malo_hal_fw_reset(mh);
553 malo_hal_gethwspecs(struct malo_hal *mh, struct malo_hal_hwspec *hw)
558 MALO_HAL_LOCK(mh);
562 cmd->ul_fw_awakecookie = htole32((unsigned int)mh->mh_cmdaddr + 2048);
564 ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_GET_HW_SPEC);
582 MALO_HAL_UNLOCK(mh);
588 malo_hal_detach(struct malo_hal *mh)
591 bus_dmamem_free(mh->mh_dmat, mh->mh_cmdbuf, mh->mh_dmamap);
592 bus_dmamap_destroy(mh->mh_dmat, mh->mh_dmamap);
593 bus_dma_tag_destroy(mh->mh_dmat);
594 mtx_destroy(&mh->mh_mtx);
595 free(mh, M_DEVBUF);
605 malo_hal_setantenna(struct malo_hal *mh, enum malo_hal_antenna dirset, int ant)
613 MALO_HAL_LOCK(mh);
624 ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_802_11_RF_ANTENNA);
626 MALO_HAL_UNLOCK(mh);
637 malo_hal_setradio(struct malo_hal *mh, int onoff,
643 MALO_HAL_LOCK(mh);
654 ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_802_11_RADIO_CONTROL);
656 MALO_HAL_UNLOCK(mh);
665 malo_hal_intrset(struct malo_hal *mh, uint32_t mask)
668 malo_hal_write4(mh, MALO_REG_A2H_INTERRUPT_MASK, 0);
669 (void)malo_hal_read4(mh, MALO_REG_INT_CODE);
671 mh->mh_imask = mask;
672 malo_hal_write4(mh, MALO_REG_A2H_INTERRUPT_MASK, mask);
673 (void)malo_hal_read4(mh, MALO_REG_INT_CODE);
677 malo_hal_setchannel(struct malo_hal *mh, const struct malo_hal_channel *chan)
682 MALO_HAL_LOCK(mh);
689 ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_SET_RF_CHANNEL);
691 MALO_HAL_UNLOCK(mh);
697 malo_hal_settxpower(struct malo_hal *mh, const struct malo_hal_channel *c)
700 const struct malo_hal_caldata *cal = &mh->mh_caldata;
705 MALO_HAL_LOCK(mh);
715 ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_802_11_RF_TX_POWER);
717 MALO_HAL_UNLOCK(mh);
723 malo_hal_setpromisc(struct malo_hal *mh, int enable)
730 malo_hal_setassocid(struct malo_hal *mh,
736 MALO_HAL_LOCK(mh);
744 ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_SET_AID);
745 MALO_HAL_UNLOCK(mh);
755 malo_hal_txstart(struct malo_hal *mh, int qnum)
757 bus_space_write_4(mh->mh_iot, mh->mh_ioh,
759 (void) bus_space_read_4(mh->mh_iot, mh->mh_ioh, MALO_REG_INT_CODE);
766 malo_hal_getisr(struct malo_hal *mh, uint32_t *status)
770 cause = bus_space_read_4(mh->mh_iot, mh->mh_ioh,
776 bus_space_write_4(mh->mh_iot, mh->mh_ioh,
777 MALO_REG_A2H_INTERRUPT_CAUSE, cause &~ mh->mh_imask);
778 (void) bus_space_read_4(mh->mh_iot, mh->mh_ioh,
780 cause &= mh->mh_imask;
791 malo_hal_cmddone(struct malo_hal *mh)
797 malo_hal_prescan(struct malo_hal *mh)
802 MALO_HAL_LOCK(mh);
807 ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_SET_PRE_SCAN);
809 MALO_HAL_UNLOCK(mh);
815 malo_hal_postscan(struct malo_hal *mh, uint8_t *macaddr, uint8_t ibsson)
820 MALO_HAL_LOCK(mh);
827 ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_SET_POST_SCAN);
829 MALO_HAL_UNLOCK(mh);
835 malo_hal_set_slot(struct malo_hal *mh, int is_short)
840 MALO_HAL_LOCK(mh);
846 ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_SET_SLOT);
848 MALO_HAL_UNLOCK(mh);
854 malo_hal_set_rate(struct malo_hal *mh, uint16_t curmode, uint8_t rate)
859 MALO_HAL_LOCK(mh);
889 ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_SET_RATE);
891 MALO_HAL_UNLOCK(mh);
897 malo_hal_setmcast(struct malo_hal *mh, int nmc, const uint8_t macs[])
905 MALO_HAL_LOCK(mh);
912 ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_MAC_MULTICAST_ADR);
914 MALO_HAL_UNLOCK(mh);