dev/ixgbe/ixgbe_x540.c

41 static s32 ixgbe_poll_flash_update_done_X540(struct ixgbe_hw *hw);
42 static s32 ixgbe_get_swfw_sync_semaphore(struct ixgbe_hw *hw);
43 static void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw);
47  *  @hw: pointer to hardware structure
52 s32 ixgbe_init_ops_X540(struct ixgbe_hw *hw)
54 	struct ixgbe_mac_info *mac = &hw->mac;
55 	struct ixgbe_phy_info *phy = &hw->phy;
56 	struct ixgbe_eeprom_info *eeprom = &hw->eeprom;
61 	ret_val = ixgbe_init_phy_ops_generic(hw);
62 	ret_val = ixgbe_init_ops_generic(hw);
125 	mac->max_msix_vectors	= ixgbe_get_pcie_msix_count_generic(hw);
132 	mac->arc_subsystem_valid = (IXGBE_READ_REG(hw, IXGBE_FWSM) &
135 	hw->mbx.ops.init_params = ixgbe_init_mbx_params_pf;
151  *  @hw: pointer to hardware structure
157 s32 ixgbe_get_link_capabilities_X540(struct ixgbe_hw *hw,
161 	ixgbe_get_copper_link_capabilities_generic(hw, speed, autoneg);
168  *  @hw: pointer to hardware structure
172 enum ixgbe_media_type ixgbe_get_media_type_X540(struct ixgbe_hw *hw)
174 	UNREFERENCED_1PARAMETER(hw);
180  *  @hw: pointer to hardware structure
184 s32 ixgbe_setup_mac_link_X540(struct ixgbe_hw *hw,
189 	return hw->phy.ops.setup_link_speed(hw, speed, autoneg_wait_to_complete);
194  *  @hw: pointer to hardware structure
199 s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw)
207 	status = hw->mac.ops.stop_adapter(hw);
212 	ixgbe_clear_tx_pending(hw);
216 	ctrl |= IXGBE_READ_REG(hw, IXGBE_CTRL);
217 	IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
218 	IXGBE_WRITE_FLUSH(hw);
223 		ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
240 	if (hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED) {
241 		hw->mac.flags &= ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED;
246 	IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(0), 384 << IXGBE_RXPBSIZE_SHIFT);
249 	hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr);
256 	hw->mac.num_rar_entries = 128;
257 	hw->mac.ops.init_rx_addrs(hw);
260 	hw->mac.ops.get_san_mac_addr(hw, hw->mac.san_addr);
263 	if (ixgbe_validate_mac_addr(hw->mac.san_addr) == 0) {
264 		hw->mac.ops.set_rar(hw, hw->mac.num_rar_entries - 1,
265 				    hw->mac.san_addr, 0, IXGBE_RAH_AV);
268 		hw->mac.san_mac_rar_index = hw->mac.num_rar_entries - 1;
271 		hw->mac.num_rar_entries--;
275 	hw->mac.ops.get_wwn_prefix(hw, &hw->mac.wwnn_prefix,
276 				   &hw->mac.wwpn_prefix);
284  *  @hw: pointer to hardware structure
290 s32 ixgbe_start_hw_X540(struct ixgbe_hw *hw)
296 	ret_val = ixgbe_start_hw_generic(hw);
300 	ret_val = ixgbe_start_hw_gen2(hw);
308  *  @hw: pointer to hardware structure
312 u32 ixgbe_get_supported_physical_layer_X540(struct ixgbe_hw *hw)
319 	hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY,
333  *  @hw: pointer to hardware structure
338 s32 ixgbe_init_eeprom_params_X540(struct ixgbe_hw *hw)
340 	struct ixgbe_eeprom_info *eeprom = &hw->eeprom;
350 		eec = IXGBE_READ_REG(hw, IXGBE_EEC);
365  *  @hw: pointer to hardware structure
371 s32 ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data)
376 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) ==
378 		status = ixgbe_read_eerd_generic(hw, offset, data);
379 		hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);
389  *  @hw: pointer to hardware structure
396 s32 ixgbe_read_eerd_buffer_X540(struct ixgbe_hw *hw,
402 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) ==
404 		status = ixgbe_read_eerd_buffer_generic(hw, offset,
406 		hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);
416  *  @hw: pointer to hardware structure
422 s32 ixgbe_write_eewr_X540(struct ixgbe_hw *hw, u16 offset, u16 data)
427 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) ==
429 		status = ixgbe_write_eewr_generic(hw, offset, data);
430 		hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);
440  *  @hw: pointer to hardware structure
447 s32 ixgbe_write_eewr_buffer_X540(struct ixgbe_hw *hw,
453 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) ==
455 		status = ixgbe_write_eewr_buffer_generic(hw, offset,
457 		hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);
471  *  @hw: pointer to hardware structure
473 u16 ixgbe_calc_eeprom_checksum_X540(struct ixgbe_hw *hw)
483 	 * Do not use hw->eeprom.ops.read because we do not want to take
492 		if (ixgbe_read_eerd_generic(hw, i, &word) != IXGBE_SUCCESS) {
507 		if (ixgbe_read_eerd_generic(hw, i, &pointer) != IXGBE_SUCCESS) {
514 		    pointer >= hw->eeprom.word_size)
517 		if (ixgbe_read_eerd_generic(hw, pointer, &length) !=
525 		    (pointer + length) >= hw->eeprom.word_size)
529 			if (ixgbe_read_eerd_generic(hw, j, &word) !=
545  *  @hw: pointer to hardware structure
551 s32 ixgbe_validate_eeprom_checksum_X540(struct ixgbe_hw *hw,
565 	status = hw->eeprom.ops.read(hw, 0, &checksum);
572 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) ==
574 		checksum = hw->eeprom.ops.calc_checksum(hw);
577 		 * Do not use hw->eeprom.ops.read because we do not want to take
580 		ixgbe_read_eerd_generic(hw, IXGBE_EEPROM_CHECKSUM,
596 		hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);
607  * @hw: pointer to hardware structure
613 s32 ixgbe_update_eeprom_checksum_X540(struct ixgbe_hw *hw)
625 	status = hw->eeprom.ops.read(hw, 0, &checksum);
630 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) ==
632 		checksum = hw->eeprom.ops.calc_checksum(hw);
635 		 * Do not use hw->eeprom.ops.write because we do not want to
638 		status = ixgbe_write_eewr_generic(hw, IXGBE_EEPROM_CHECKSUM,
642 			status = ixgbe_update_flash_X540(hw);
643 		hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);
653  *  @hw: pointer to hardware structure
658 s32 ixgbe_update_flash_X540(struct ixgbe_hw *hw)
665 	status = ixgbe_poll_flash_update_done_X540(hw);
671 	flup = IXGBE_READ_REG(hw, IXGBE_EEC) | IXGBE_EEC_FLUP;
672 	IXGBE_WRITE_REG(hw, IXGBE_EEC, flup);
674 	status = ixgbe_poll_flash_update_done_X540(hw);
680 	if (hw->mac.type == ixgbe_mac_X540 && hw->revision_id == 0) {
681 		flup = IXGBE_READ_REG(hw, IXGBE_EEC);
685 			IXGBE_WRITE_REG(hw, IXGBE_EEC, flup);
688 		status = ixgbe_poll_flash_update_done_X540(hw);
700  *  @hw: pointer to hardware structure
705 static s32 ixgbe_poll_flash_update_done_X540(struct ixgbe_hw *hw)
714 		reg = IXGBE_READ_REG(hw, IXGBE_EEC);
731  *  @hw: pointer to hardware structure
737 s32 ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u16 mask)
761 		if (ixgbe_get_swfw_sync_semaphore(hw)) {
766 		swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC);
769 			IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC, swfw_sync);
770 			ixgbe_release_swfw_sync_semaphore(hw);
778 			ixgbe_release_swfw_sync_semaphore(hw);
796 	swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC);
798 		if (ixgbe_get_swfw_sync_semaphore(hw)) {
804 		IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC, swfw_sync);
805 		ixgbe_release_swfw_sync_semaphore(hw);
814 		ixgbe_release_swfw_sync_X540(hw, IXGBE_GSSR_EEP_SM |
826  *  @hw: pointer to hardware structure
832 void ixgbe_release_swfw_sync_X540(struct ixgbe_hw *hw, u16 mask)
839 	ixgbe_get_swfw_sync_semaphore(hw);
841 	swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC);
843 	IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC, swfw_sync);
845 	ixgbe_release_swfw_sync_semaphore(hw);
850  *  @hw: pointer to hardware structure
854 static s32 ixgbe_get_swfw_sync_semaphore(struct ixgbe_hw *hw)
869 		swsm = IXGBE_READ_REG(hw, IXGBE_SWSM);
880 			swsm = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC);
894 			ixgbe_release_swfw_sync_semaphore(hw);
908  *  @hw: pointer to hardware structure
912 static void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw)
920 	swsm = IXGBE_READ_REG(hw, IXGBE_SWSM);
922 	IXGBE_WRITE_REG(hw, IXGBE_SWSM, swsm);
924 	swsm = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC);
926 	IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC, swsm);
928 	IXGBE_WRITE_FLUSH(hw);
933  * @hw: pointer to hardware structure
939 s32 ixgbe_blink_led_start_X540(struct ixgbe_hw *hw, u32 index)
953 	hw->mac.ops.check_link(hw, &speed, &link_up, FALSE);
955 		macc_reg = IXGBE_READ_REG(hw, IXGBE_MACC);
957 		IXGBE_WRITE_REG(hw, IXGBE_MACC, macc_reg);
960 	ledctl_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
963 	IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, ledctl_reg);
964 	IXGBE_WRITE_FLUSH(hw);
971  * @hw: pointer to hardware structure
977 s32 ixgbe_blink_led_stop_X540(struct ixgbe_hw *hw, u32 index)
985 	ledctl_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
989 	IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, ledctl_reg);
992 	macc_reg = IXGBE_READ_REG(hw, IXGBE_MACC);
994 	IXGBE_WRITE_REG(hw, IXGBE_MACC, macc_reg);
995 	IXGBE_WRITE_FLUSH(hw);