dev/e1000/e1000_82543.c

87 	s32 ret_val = E1000_SUCCESS;
127 		ret_val = phy->ops.reset(hw);
128 		if (ret_val) {
135 	ret_val = e1000_get_phy_id(hw);
136 	if (ret_val)
143 			ret_val = -E1000_ERR_PHY;
149 			ret_val = -E1000_ERR_PHY;
154 		ret_val = -E1000_ERR_PHY;
160 	return ret_val;
389 	bool ret_val;
394 		ret_val = FALSE;
398 	ret_val = dev_spec->init_phy_disabled;
401 	return ret_val;
493 	s32 ret_val = E1000_SUCCESS;
499 		ret_val = -E1000_ERR_PARAM;
535 	return ret_val;
549 	s32 ret_val = E1000_SUCCESS;
555 		ret_val = -E1000_ERR_PARAM;
582 	return ret_val;
744 	s32 ret_val;
748 	ret_val = e1000_phy_force_speed_duplex_m88(hw);
749 	if (ret_val)
754 		ret_val = e1000_polarity_reversal_workaround_82543(hw);
757 	return ret_val;
770 	s32 ret_val = E1000_SUCCESS;
782 	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019);
783 	if (ret_val)
785 	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFFF);
786 	if (ret_val)
789 	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0000);
790 	if (ret_val)
803 		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);
804 		if (ret_val)
807 		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);
808 		if (ret_val)
821 	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019);
822 	if (ret_val)
825 	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFF0);
826 	if (ret_val)
829 	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFF00);
830 	if (ret_val)
833 	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0x0000);
834 	if (ret_val)
837 	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0000);
838 	if (ret_val)
845 	ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_TIME, 100000, &link);
846 	if (ret_val)
850 	return ret_val;
865 	s32 ret_val;
891 	ret_val = hw->phy.ops.get_cfg_done(hw);
893 	return ret_val;
905 	s32 ret_val = E1000_SUCCESS;
948 	return ret_val;
962 	s32 ret_val;
994 	ret_val = mac->ops.setup_link(hw);
1004 	return ret_val;
1023 	s32  ret_val;
1036 		ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG, 1, &data);
1037 		if (ret_val) {
1039 			ret_val = -E1000_ERR_NVM;
1047 	ret_val = e1000_setup_link_generic(hw);
1050 	return ret_val;
1064 	s32 ret_val;
1079 		ret_val = hw->phy.ops.reset(hw);
1080 		if (ret_val)
1088 	ret_val = e1000_copper_link_setup_m88(hw);
1089 	if (ret_val)
1097 		ret_val = e1000_copper_link_autoneg(hw);
1098 		if (ret_val)
1106 		ret_val = e1000_phy_force_speed_duplex_82543(hw);
1107 		if (ret_val) {
1117 	ret_val = e1000_phy_has_link_generic(hw,
1121 	if (ret_val)
1131 			ret_val = e1000_config_mac_to_phy_82543(hw);
1132 			if (ret_val)
1135 		ret_val = e1000_config_fc_after_link_up_generic(hw);
1141 	return ret_val;
1154 	s32 ret_val;
1165 	ret_val = e1000_commit_fc_settings_generic(hw);
1166 	if (ret_val)
1181 		ret_val = e1000_poll_fiber_serdes_link_generic(hw);
1187 	return ret_val;
1205 	s32 ret_val;
1212 		ret_val = E1000_SUCCESS;
1216 	ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);
1217 	if (ret_val)
1242 			ret_val = e1000_polarity_reversal_workaround_82543(hw);
1248 		ret_val = -E1000_ERR_CONFIG;
1264 		ret_val = e1000_config_mac_to_phy_82543(hw);
1265 		if (ret_val) {
1277 	ret_val = e1000_config_fc_after_link_up_generic(hw);
1278 	if (ret_val) {
1291 		ret_val = mac->ops.get_link_up_info(hw, &speed, &duplex);
1292 		if (ret_val) {
1294 			return ret_val;
1328 	return ret_val;
1342 	s32 ret_val = E1000_SUCCESS;
1364 			ret_val = 0;
1378 		ret_val = e1000_config_fc_after_link_up_generic(hw);
1379 		if (ret_val) {
1398 	return ret_val;
1411 	s32 ret_val = E1000_SUCCESS;
1428 	ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
1429 	if (ret_val)
1450 	return ret_val;
1576 	s32  ret_val = E1000_SUCCESS;
1583 		ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data);
1584 		if (ret_val) {
1600 	return ret_val;