Lines Matching refs:base
382 uint64_t base;
434 &base);
445 /* crtc offset is from display base addr not FB location */
448 base -= radeon_crtc->legacy_display_base_addr;
478 base &= ~0x7ff;
482 base += tile_addr + ((x << byteshift) % 256) + ((y % 8) << 8);
504 base += offset;
507 base &= ~7;
520 crtc_offset = (u32)base;
1084 drm_crtc_helper_add(&radeon_crtc->base, &legacy_helper_funcs);