Lines Matching refs:base
757 radeon_write_agp_base(dev_priv, dev->agp->base);
765 - dev->agp->base
788 - dev->agp->base + dev_priv->gart_vm_start);
1102 /* set PCI GART page-table base address
1379 u32 base = 0;
1389 base = dev->agp->base;
1391 if ((base + dev_priv->gart_size - 1) >= dev_priv->fb_location &&
1392 base < (dev_priv->fb_location + dev_priv->fb_size - 1)) {
1393 DRM_INFO("Can't use AGP base @0x%08lx, won't fit\n",
1394 dev->agp->base);
1395 base = 0;
1400 if (base == 0) {
1401 base = dev_priv->fb_location + dev_priv->fb_size;
1402 if (base < dev_priv->fb_location ||
1403 ((base + dev_priv->gart_size) & 0xfffffffful) < base)
1404 base = dev_priv->fb_location
1407 dev_priv->gart_vm_start = base & 0xffc00000u;
1408 if (dev_priv->gart_vm_start != base)
1410 base, dev_priv->gart_vm_start);
1420 - dev->agp->base