Lines Matching refs:v2

550 	LVDS_ENCODER_CONTROL_PS_ALLOCATION_V2 v2;
618 args.v2.ucMisc = 0;
619 args.v2.ucAction = action;
622 args.v2.ucMisc |= PANEL_ENCODER_MISC_COHERENT;
625 args.v2.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE;
626 args.v2.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
627 args.v2.ucTruncate = 0;
628 args.v2.ucSpatial = 0;
629 args.v2.ucTemporal = 0;
630 args.v2.ucFRC = 0;
633 args.v2.ucMisc |= PANEL_ENCODER_MISC_DUAL;
635 args.v2.ucSpatial = PANEL_ENCODER_SPATIAL_DITHER_EN;
637 args.v2.ucSpatial |= PANEL_ENCODER_SPATIAL_DITHER_DEPTH;
640 args.v2.ucTemporal = PANEL_ENCODER_TEMPORAL_DITHER_EN;
642 args.v2.ucTemporal |= PANEL_ENCODER_TEMPORAL_DITHER_DEPTH;
644 args.v2.ucTemporal |= PANEL_ENCODER_TEMPORAL_LEVEL_4;
648 args.v2.ucMisc |= PANEL_ENCODER_MISC_TMDS_LINKB;
650 args.v2.ucMisc |= PANEL_ENCODER_MISC_DUAL;
790 DIG_ENCODER_CONTROL_PARAMETERS_V2 v2;
940 DIG_TRANSMITTER_CONTROL_PARAMETERS_V2 v2;
1080 args.v2.ucAction = action;
1082 args.v2.usInitInfo = cpu_to_le16(connector_object_id);
1084 args.v2.asMode.ucLaneSel = lane_num;
1085 args.v2.asMode.ucLaneSet = lane_set;
1088 args.v2.usPixelClock = cpu_to_le16(dp_clock / 10);
1090 args.v2.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10);
1092 args.v2.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
1095 args.v2.acConfig.ucEncoderSel = dig_encoder;
1097 args.v2.acConfig.ucLinkSel = 1;
1101 args.v2.acConfig.ucTransmitterSel = 0;
1104 args.v2.acConfig.ucTransmitterSel = 1;
1107 args.v2.acConfig.ucTransmitterSel = 2;
1112 args.v2.acConfig.fCoherentMode = 1;
1113 args.v2.acConfig.fDPConnector = 1;
1116 args.v2.acConfig.fCoherentMode = 1;
1118 args.v2.acConfig.fDualLinkConnector = 1;
1781 SELECT_CRTC_SOURCE_PARAMETERS_V2 v2;
1853 args.v2.ucCRTC = radeon_crtc->crtc_id;
1858 args.v2.ucEncodeMode = ATOM_ENCODER_MODE_LVDS;
1860 args.v2.ucEncodeMode = ATOM_ENCODER_MODE_CRT;
1862 args.v2.ucEncodeMode = atombios_get_encoder_mode(encoder);
1864 args.v2.ucEncodeMode = atombios_get_encoder_mode(encoder);
1873 args.v2.ucEncoderID = ASIC_INT_DIG1_ENCODER_ID;
1876 args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID;
1879 args.v2.ucEncoderID = ASIC_INT_DIG3_ENCODER_ID;
1882 args.v2.ucEncoderID = ASIC_INT_DIG4_ENCODER_ID;
1885 args.v2.ucEncoderID = ASIC_INT_DIG5_ENCODER_ID;
1888 args.v2.ucEncoderID = ASIC_INT_DIG6_ENCODER_ID;
1893 args.v2.ucEncoderID = ASIC_INT_DVO_ENCODER_ID;
1897 args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID;
1899 args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID;
1901 args.v2.ucEncoderID = ASIC_INT_DAC1_ENCODER_ID;
1905 args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID;
1907 args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID;
1909 args.v2.ucEncoderID = ASIC_INT_DAC2_ENCODER_ID;