dev/aic7xxx/aic7xxx_osm.c

606 		struct	ccb_trans_settings_spi *spi;
615 		spi = &cts->xport_specific.spi;
651 		if ((spi->valid & CTS_SPI_VALID_DISC) != 0) {
652 			if ((spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0)
665 		if ((spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0) {
667 					   &spi->bus_width, ROLE_UNKNOWN);
668 			ahc_set_width(ahc, &devinfo, spi->bus_width,
672 		if ((spi->valid & CTS_SPI_VALID_PPR_OPTIONS) == 0) {
674 				spi->ppr_options = tinfo->user.ppr_options;
676 				spi->ppr_options = tinfo->goal.ppr_options;
679 		if ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) == 0) {
681 				spi->sync_offset = tinfo->user.offset;
683 				spi->sync_offset = tinfo->goal.offset;
686 		if ((spi->valid & CTS_SPI_VALID_SYNC_RATE) == 0) {
688 				spi->sync_period = tinfo->user.period;
690 				spi->sync_period = tinfo->goal.period;
693 		if (((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0)
694 		 || ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)) {
705 			if (spi->bus_width != MSG_EXT_WDTR_BUS_16_BIT)
706 				spi->ppr_options &= ~MSG_EXT_PPR_DT_REQ;
708 			syncrate = ahc_find_syncrate(ahc, &spi->sync_period,
709 						     &spi->ppr_options,
712 					    syncrate, &spi->sync_offset,
713 					    spi->bus_width, ROLE_UNKNOWN);
716 			if (spi->sync_offset == 0) {
717 				spi->sync_period = 0;
718 				spi->ppr_options = 0;
722 					 spi->sync_period, spi->sync_offset,
723 					 spi->ppr_options, update_type,
808 		cpi->xport_specific.spi.ppr_options = SID_SPI_CLOCK_ST;
811 			cpi->xport_specific.spi.ppr_options =
831 	struct	ccb_trans_settings_spi *spi;
837 	spi = &cts->xport_specific.spi;
852 	spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB;
855 			spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
861 			spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
869 	spi->sync_period = tinfo->period;
870 	spi->sync_offset = tinfo->offset;
871 	spi->bus_width = tinfo->width;
872 	spi->ppr_options = tinfo->ppr_options;
876 	spi->valid = CTS_SPI_VALID_SYNC_RATE
883 		spi->valid |= CTS_SPI_VALID_DISC;