Lines Matching defs:spi
464 struct ccb_trans_settings_spi *spi;
472 spi = &cts->xport_specific.spi;
477 if ((spi->valid & CTS_SPI_VALID_DISC) != 0) {
483 if ((spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0)
500 if ((spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0) {
510 switch (spi->bus_width) {
536 if (((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0)
537 || ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)) {
550 if ((spi->valid
555 spi->sync_period);
558 if ((spi->valid
560 if (spi->sync_offset == 0)
590 struct ccb_trans_settings_spi *spi;
602 spi = &cts->xport_specific.spi;
606 spi->flags = 0;
608 spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
614 spi->bus_width = MSG_EXT_WDTR_BUS_16_BIT;
616 spi->bus_width = MSG_EXT_WDTR_BUS_8_BIT;
619 spi->sync_period = adw_find_period(adw, mc_sdtr);
620 if (spi->sync_period != 0)
621 spi->sync_offset = 15; /* XXX ??? */
623 spi->sync_offset = 0;
629 spi->flags = 0;
632 spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
643 spi->bus_width = MSG_EXT_WDTR_BUS_16_BIT;
645 spi->bus_width = MSG_EXT_WDTR_BUS_8_BIT;
647 spi->sync_period =
650 spi->sync_offset = targ_tinfo & ADW_HSHK_CFG_OFFSET;
651 if (spi->sync_period == 0)
652 spi->sync_offset = 0;
654 if (spi->sync_offset == 0)
655 spi->sync_period = 0;
658 spi->valid = CTS_SPI_VALID_SYNC_RATE