Lines Matching refs:adv
83 static void adv_intr_locked(struct adv_softc *adv);
85 static void adv_run_doneq(struct adv_softc *adv);
87 adv_alloc_ccb_info(struct adv_softc *adv);
88 static void adv_destroy_ccb_info(struct adv_softc *adv,
91 adv_get_ccb_info(struct adv_softc *adv);
92 static __inline void adv_free_ccb_info(struct adv_softc *adv,
94 static __inline void adv_set_state(struct adv_softc *adv, adv_state state);
95 static __inline void adv_clear_state(struct adv_softc *adv, union ccb* ccb);
96 static void adv_clear_state_really(struct adv_softc *adv, union ccb* ccb);
99 adv_get_ccb_info(struct adv_softc *adv)
104 mtx_assert(&adv->lock, MA_OWNED);
105 if ((cinfo = SLIST_FIRST(&adv->free_ccb_infos)) != NULL) {
106 SLIST_REMOVE_HEAD(&adv->free_ccb_infos, links);
108 cinfo = adv_alloc_ccb_info(adv);
115 adv_free_ccb_info(struct adv_softc *adv, struct adv_ccb_info *cinfo)
119 mtx_assert(&adv->lock, MA_OWNED);
121 SLIST_INSERT_HEAD(&adv->free_ccb_infos, cinfo, links);
125 adv_set_state(struct adv_softc *adv, adv_state state)
127 if (adv->state == 0)
128 xpt_freeze_simq(adv->sim, /*count*/1);
129 adv->state |= state;
133 adv_clear_state(struct adv_softc *adv, union ccb* ccb)
135 if (adv->state != 0)
136 adv_clear_state_really(adv, ccb);
140 adv_clear_state_really(struct adv_softc *adv, union ccb* ccb)
144 mtx_assert(&adv->lock, MA_OWNED);
145 if ((adv->state & ADV_BUSDMA_BLOCK_CLEARED) != 0)
146 adv->state &= ~(ADV_BUSDMA_BLOCK_CLEARED|ADV_BUSDMA_BLOCK);
147 if ((adv->state & ADV_RESOURCE_SHORTAGE) != 0) {
150 openings = adv->max_openings - adv->cur_active - ADV_MIN_FREE_Q;
151 if (openings >= adv->openings_needed) {
152 adv->state &= ~ADV_RESOURCE_SHORTAGE;
153 adv->openings_needed = 0;
157 if ((adv->state & ADV_IN_TIMEOUT) != 0) {
168 ccb_h = LIST_FIRST(&adv->pending_ccbs);
176 adv->state &= ~ADV_IN_TIMEOUT;
177 device_printf(adv->dev, "No longer in timeout\n");
180 if (adv->state == 0)
196 struct adv_softc *adv;
200 adv = (struct adv_softc *)cam_sim_softc(sim);
201 mtx_assert(&adv->lock, MA_OWNED);
214 cinfo = adv_get_ccb_info(adv);
221 error = bus_dmamap_load_ccb(adv->buffer_dmat,
231 adv_set_state(adv, ADV_BUSDMA_BLOCK);
265 tconf = &adv->tinfo[cts->ccb_h.target_id].current;
268 tconf = &adv->tinfo[cts->ccb_h.target_id].user;
280 adv->disc_enable |= targ_mask;
282 adv->disc_enable &= ~targ_mask;
283 adv_write_lram_8(adv, ADVV_DISC_ENABLE_B,
284 adv->disc_enable);
289 adv->cmd_qng_enabled |= targ_mask;
291 adv->cmd_qng_enabled &= ~targ_mask;
298 adv->user_disc_enable |= targ_mask;
300 adv->user_disc_enable &= ~targ_mask;
305 adv->user_cmd_qng_enabled |= targ_mask;
307 adv->user_cmd_qng_enabled &= ~targ_mask;
332 adv_period_offset_to_sdtr(adv, &spi->sync_period,
336 adv_set_syncrate(adv, /*struct cam_path */NULL,
369 tconf = &adv->tinfo[cts->ccb_h.target_id].current;
370 if ((adv->disc_enable & target_mask) != 0)
372 if ((adv->cmd_qng_enabled & target_mask) != 0)
375 tconf = &adv->tinfo[cts->ccb_h.target_id].user;
376 if ((adv->user_disc_enable & target_mask) != 0)
378 if ((adv->user_cmd_qng_enabled & target_mask) != 0)
397 extended = (adv->control & ADV_CNTL_BIOS_GT_1GB) != 0;
405 adv_stop_execution(adv);
406 adv_reset_bus(adv, /*initiate_reset*/TRUE);
407 adv_start_execution(adv);
429 cpi->initiator_id = adv->scsi_id;
455 #define adv_fixup_dmasegs(adv, dm_segs) (struct adv_sg_entry *)(dm_segs)
464 struct adv_softc *adv;
472 adv = (struct adv_softc *)cam_sim_softc(sim);
475 mtx_assert(&adv->lock, MA_OWNED);
481 if ((adv->state & ADV_BUSDMA_BLOCK) != 0)
482 adv->state |= ADV_BUSDMA_BLOCK_CLEARED;
506 scsiq.q2.ccb_index = cinfo - adv->ccb_infos;
528 sghead.sg_list = adv_fixup_dmasegs(adv, dm_segs);
537 bus_dmamap_sync(adv->buffer_dmat, cinfo->dmamap, op);
550 bus_dmamap_unload(adv->buffer_dmat, cinfo->dmamap);
551 adv_clear_state(adv, (union ccb *)csio);
552 adv_free_ccb_info(adv, cinfo);
557 if (adv_execute_scsi_queue(adv, &scsiq, csio->dxfer_len) != 0) {
559 adv_set_state(adv, ADV_RESOURCE_SHORTAGE);
561 bus_dmamap_unload(adv->buffer_dmat, cinfo->dmamap);
563 adv_clear_state(adv, (union ccb *)csio);
564 adv_free_ccb_info(adv, cinfo);
570 LIST_INSERT_HEAD(&adv->pending_ccbs, ccb_h, sim_links.le);
577 adv_alloc_ccb_info(struct adv_softc *adv)
582 cinfo = &adv->ccb_infos[adv->ccb_infos_allocated];
584 callout_init_mtx(&cinfo->timer, &adv->lock, 0);
585 error = bus_dmamap_create(adv->buffer_dmat, /*flags*/0,
588 device_printf(adv->dev, "Unable to allocate CCB info "
592 adv->ccb_infos_allocated++;
597 adv_destroy_ccb_info(struct adv_softc *adv, struct adv_ccb_info *cinfo)
601 bus_dmamap_destroy(adv->buffer_dmat, cinfo->dmamap);
608 struct adv_softc *adv;
612 adv = (struct adv_softc *)xpt_path_sim(ccb->ccb_h.path)->softc;
614 mtx_assert(&adv->lock, MA_OWNED);
624 adv_stop_execution(adv);
639 adv_set_state(adv, ADV_IN_TIMEOUT);
644 ccb_h = LIST_FIRST(&adv->pending_ccbs);
655 adv_abort_ccb(adv, ccb->ccb_h.target_id,
665 adv_reset_bus(adv, /*initiate_reset*/TRUE);
667 adv_start_execution(adv);
673 struct adv_softc *adv = device_get_softc(dev);
678 LIST_INIT(&adv->pending_ccbs);
679 SLIST_INIT(&adv->free_ccb_infos);
680 adv->dev = dev;
681 adv->res = res;
682 adv->reg_off = offset;
683 mtx_init(&adv->lock, "adv", NULL, MTX_DEF);
685 return(adv);
689 adv_free(struct adv_softc *adv)
691 switch (adv->init_level) {
696 while ((cinfo = SLIST_FIRST(&adv->free_ccb_infos)) != NULL) {
697 SLIST_REMOVE_HEAD(&adv->free_ccb_infos, links);
698 adv_destroy_ccb_info(adv, cinfo);
701 bus_dmamap_unload(adv->sense_dmat, adv->sense_dmamap);
704 bus_dmamem_free(adv->sense_dmat, adv->sense_buffers,
705 adv->sense_dmamap);
707 bus_dma_tag_destroy(adv->sense_dmat);
709 bus_dma_tag_destroy(adv->buffer_dmat);
711 bus_dma_tag_destroy(adv->parent_dmat);
713 if (adv->ccb_infos != NULL)
714 free(adv->ccb_infos, M_DEVBUF);
716 mtx_destroy(&adv->lock);
722 adv_init(struct adv_softc *adv)
730 mtx_lock(&adv->lock);
731 adv_lib_init(adv);
736 adv_write_lram_16(adv, ADV_HALTCODE_W, 0x00FE);
737 adv_stop_execution(adv);
738 if (adv_stop_chip(adv) == 0 || adv_is_chip_halted(adv) == 0) {
739 mtx_unlock(&adv->lock);
740 device_printf(adv->dev,
744 ADV_OUTW(adv, ADV_REG_PROG_COUNTER, ADV_MCODE_START_ADDR);
745 if (ADV_INW(adv, ADV_REG_PROG_COUNTER) != ADV_MCODE_START_ADDR) {
746 mtx_unlock(&adv->lock);
747 device_printf(adv->dev,
752 config_msw = ADV_INW(adv, ADV_CONFIG_MSW);
753 config_lsw = ADV_INW(adv, ADV_CONFIG_LSW);
763 ADV_OUTW(adv, ADV_CONFIG_MSW, config_msw);
767 checksum = adv_get_eeprom_config(adv, &eeprom_config);
769 if (ADV_INW(adv, ADV_CHIP_STATUS) & ADV_CSW_AUTO_CONFIG) {
775 if (adv->chip_version == 3) {
798 adv->max_openings = eeprom_config.max_total_qng;
799 adv->user_disc_enable = eeprom_config.disc_enable;
800 adv->user_cmd_qng_enabled = eeprom_config.use_cmd_qng;
801 adv->isa_dma_speed = EEPROM_DMA_SPEED(eeprom_config);
802 adv->scsi_id = EEPROM_SCSIID(eeprom_config) & ADV_MAX_TID;
803 EEPROM_SET_SCSIID(eeprom_config, adv->scsi_id);
804 adv->control = eeprom_config.cntl;
812 adv_sdtr_to_period_offset(adv,
814 &adv->tinfo[i].user.period,
815 &adv->tinfo[i].user.offset,
823 device_printf(adv->dev, "Warning EEPROM Checksum mismatch. "
827 adv->isa_dma_speed = /*ADV_DEF_ISA_DMA_SPEED*/1;
828 adv->max_openings = ADV_DEF_MAX_TOTAL_QNG;
829 adv->disc_enable = TARGET_BIT_VECTOR_SET;
830 adv->user_disc_enable = TARGET_BIT_VECTOR_SET;
831 adv->cmd_qng_enabled = TARGET_BIT_VECTOR_SET;
832 adv->user_cmd_qng_enabled = TARGET_BIT_VECTOR_SET;
833 adv->scsi_id = 7;
834 adv->control = 0xFFFF;
836 if (adv->chip_version == ADV_CHIP_VER_PCI_ULTRA_3050)
838 adv->control &= ~ADV_CNTL_SDTR_ENABLE_ULTRA;
841 adv_sdtr_to_period_offset(adv, sync_data,
842 &adv->tinfo[i].user.period,
843 &adv->tinfo[i].user.offset,
850 if ((adv->type & (ADV_PCI|ADV_ULTRA)) == (ADV_PCI|ADV_ULTRA)
851 && (adv->control & ADV_CNTL_SDTR_ENABLE_ULTRA) == 0)
858 if (adv->tinfo[i].user.period < max_sync)
859 adv->tinfo[i].user.period = max_sync;
862 if (adv_test_external_lram(adv) == 0) {
863 if ((adv->type & (ADV_PCI|ADV_ULTRA)) == (ADV_PCI|ADV_ULTRA)) {
875 adv->max_openings = eeprom_config.max_total_qng;
877 ADV_OUTW(adv, ADV_CONFIG_MSW, config_msw);
878 ADV_OUTW(adv, ADV_CONFIG_LSW, config_lsw);
886 if (adv_set_eeprom_config(adv, &eeprom_config) != 0)
887 device_printf(adv->dev,
891 adv_set_chip_scsiid(adv, adv->scsi_id);
892 if (adv_init_lram_and_mcode(adv)) {
893 mtx_unlock(&adv->lock);
897 adv->disc_enable = adv->user_disc_enable;
899 adv_write_lram_8(adv, ADVV_DISC_ENABLE_B, adv->disc_enable);
904 adv_set_syncrate(adv, /*struct cam_path */NULL,
913 adv_write_lram_8(adv, ADVV_MAX_DVC_QNG_BEG + i,
914 adv->max_openings);
916 adv_write_lram_8(adv, ADVV_USE_TAGGED_QNG_B, TARGET_BIT_VECTOR_SET);
917 adv_write_lram_8(adv, ADVV_CAN_TAGGED_QNG_B, TARGET_BIT_VECTOR_SET);
918 device_printf(adv->dev,
920 (adv->type & ADV_ULTRA) && (max_sync == 0)
922 adv->scsi_id, adv->max_openings);
923 mtx_unlock(&adv->lock);
930 struct adv_softc *adv;
932 adv = arg;
933 mtx_lock(&adv->lock);
934 adv_intr_locked(adv);
935 mtx_unlock(&adv->lock);
939 adv_intr_locked(struct adv_softc *adv)
948 mtx_assert(&adv->lock, MA_OWNED);
949 chipstat = ADV_INW(adv, ADV_CHIP_STATUS);
955 ctrl_reg = ADV_INB(adv, ADV_CHIP_CTRL);
961 device_printf(adv->dev, "Detected Bus Reset\n");
962 adv_reset_bus(adv, /*initiate_reset*/FALSE);
968 saved_ram_addr = ADV_INW(adv, ADV_LRAM_ADDR);
969 host_flag = adv_read_lram_8(adv, ADVV_HOST_FLAG_B);
970 adv_write_lram_8(adv, ADVV_HOST_FLAG_B,
973 adv_ack_interrupt(adv);
977 adv_isr_chip_halted(adv);
980 adv_run_doneq(adv);
982 ADV_OUTW(adv, ADV_LRAM_ADDR, saved_ram_addr);
984 if (ADV_INW(adv, ADV_LRAM_ADDR) != saved_ram_addr)
987 adv_write_lram_8(adv, ADVV_HOST_FLAG_B, host_flag);
990 ADV_OUTB(adv, ADV_CHIP_CTRL, saved_ctrl_reg);
994 adv_run_doneq(struct adv_softc *adv)
1000 doneq_head = adv_read_lram_16(adv, ADVV_DONE_Q_TAIL_W) & 0xFF;
1001 done_qno = adv_read_lram_8(adv, ADV_QNO_TO_QADDR(doneq_head)
1013 sg_queue_cnt = adv_copy_lram_doneq(adv, done_qaddr, &scsiq,
1014 adv->max_dma_count);
1017 adv_write_lram_8(adv, done_qaddr + ADV_SCSIQ_B_STATUS,
1029 done_qno = adv_read_lram_8(adv, done_qaddr
1041 adv_write_lram_8(adv, done_qaddr
1047 if (adv->cur_active < (sg_queue_cnt + 1))
1051 adv->cur_active -= sg_queue_cnt + 1;
1069 cinfo = &adv->ccb_infos[scsiq.d2.ccb_index];
1072 adv_done(adv, ccb,
1077 done_qno = adv_read_lram_8(adv, done_qaddr + ADV_SCSIQ_B_FWD);
1079 adv_write_lram_16(adv, ADVV_DONE_Q_TAIL_W, doneq_head);
1084 adv_done(struct adv_softc *adv, union ccb *ccb, u_int done_stat,
1090 mtx_assert(&adv->lock, MA_OWNED);
1101 bus_dmamap_sync(adv->buffer_dmat, cinfo->dmamap, op);
1102 bus_dmamap_unload(adv->buffer_dmat, cinfo->dmamap);
1137 adv_abort_ccb(adv, ccb->ccb_h.target_id,
1151 adv->sense_buffers[q_no - 1];
1187 adv_reset_bus(adv, /*initiate_reset*/TRUE);
1202 device_get_nameunit(adv->dev), host_stat);
1220 adv_clear_state(adv, ccb);
1226 adv_free_ccb_info(adv, cinfo);
1251 adv_attach(adv)
1252 struct adv_softc *adv;
1264 adv->ccb_infos = malloc(sizeof(*adv->ccb_infos) * adv->max_openings,
1267 if (adv->ccb_infos == NULL)
1270 adv->init_level++;
1296 max_sg = (adv->max_openings - ADV_MIN_FREE_Q - 1) * ADV_SG_LIST_PER_Q;
1302 /* parent */ adv->parent_dmat,
1314 /* lockarg */ &adv->lock,
1315 &adv->buffer_dmat) != 0) {
1318 adv->init_level++;
1322 /* parent */ adv->parent_dmat,
1330 adv->max_openings,
1335 /* lockarg */ &adv->lock,
1336 &adv->sense_dmat) != 0) {
1340 adv->init_level++;
1343 if (bus_dmamem_alloc(adv->sense_dmat, (void **)&adv->sense_buffers,
1344 BUS_DMA_NOWAIT, &adv->sense_dmamap) != 0) {
1348 adv->init_level++;
1351 bus_dmamap_load(adv->sense_dmat, adv->sense_dmamap,
1352 adv->sense_buffers,
1353 sizeof(struct scsi_sense_data)*adv->max_openings,
1354 adv_map, &adv->sense_physbase, /*flags*/0);
1356 adv->init_level++;
1361 if (adv_start_chip(adv) != 1) {
1362 device_printf(adv->dev,
1370 devq = cam_simq_alloc(adv->max_openings);
1377 adv->sim = cam_sim_alloc(adv_action, adv_poll, "adv", adv,
1378 device_get_unit(adv->dev), &adv->lock, 1, adv->max_openings, devq);
1379 if (adv->sim == NULL)
1387 mtx_lock(&adv->lock);
1388 if (xpt_bus_register(adv->sim, adv->dev, 0) != CAM_SUCCESS) {
1389 cam_sim_free(adv->sim, /*free devq*/TRUE);
1390 mtx_unlock(&adv->lock);
1394 if (xpt_create_path(&adv->path, /*periph*/NULL, cam_sim_path(adv->sim),
1397 xpt_bus_deregister(cam_sim_path(adv->sim));
1398 cam_sim_free(adv->sim, /*free devq*/TRUE);
1399 mtx_unlock(&adv->lock);
1403 xpt_setup_ccb(&csa.ccb_h, adv->path, /*priority*/5);
1407 csa.callback_arg = adv;
1409 mtx_unlock(&adv->lock);
1412 MODULE_DEPEND(adv, cam, 1, 1, 1);