contrib/octeon-sdk/cvmx-sriox-defs.h

61 	return CVMX_ADD_IO_SEG(0x00011800C8000148ull) + ((block_id) & 1) * 0x1000000ull;
64 #define CVMX_SRIOX_ACC_CTRL(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000148ull) + ((block_id) & 1) * 0x1000000ull)
72 	return CVMX_ADD_IO_SEG(0x00011800C8000200ull) + ((block_id) & 1) * 0x1000000ull;
75 #define CVMX_SRIOX_ASMBLY_ID(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000200ull) + ((block_id) & 1) * 0x1000000ull)
83 	return CVMX_ADD_IO_SEG(0x00011800C8000208ull) + ((block_id) & 1) * 0x1000000ull;
86 #define CVMX_SRIOX_ASMBLY_INFO(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000208ull) + ((block_id) & 1) * 0x1000000ull)
94 	return CVMX_ADD_IO_SEG(0x00011800C8000310ull) + ((block_id) & 1) * 0x1000000ull;
97 #define CVMX_SRIOX_BELL_RESP_CTRL(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000310ull) + ((block_id) & 1) * 0x1000000ull)
105 	return CVMX_ADD_IO_SEG(0x00011800C8000108ull) + ((block_id) & 1) * 0x1000000ull;
108 #define CVMX_SRIOX_BIST_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000108ull) + ((block_id) & 1) * 0x1000000ull)
116 	return CVMX_ADD_IO_SEG(0x00011800C8000508ull) + ((block_id) & 1) * 0x1000000ull;
119 #define CVMX_SRIOX_IMSG_CTRL(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000508ull) + ((block_id) & 1) * 0x1000000ull)
127 	return CVMX_ADD_IO_SEG(0x00011800C8000510ull) + (((offset) & 1) + ((block_id) & 1) * 0x200000ull) * 8;
130 #define CVMX_SRIOX_IMSG_INST_HDRX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000510ull) + (((offset) & 1) + ((block_id) & 1) * 0x200000ull) * 8)
138 	return CVMX_ADD_IO_SEG(0x00011800C8000600ull) + (((offset) & 31) + ((block_id) & 1) * 0x200000ull) * 8;
141 #define CVMX_SRIOX_IMSG_QOS_GRPX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000600ull) + (((offset) & 31) + ((block_id) & 1) * 0x200000ull) * 8)
149 	return CVMX_ADD_IO_SEG(0x00011800C8000700ull) + (((offset) & 31) + ((block_id) & 1) * 0x200000ull) * 8;
152 #define CVMX_SRIOX_IMSG_STATUSX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000700ull) + (((offset) & 31) + ((block_id) & 1) * 0x200000ull) * 8)
160 	return CVMX_ADD_IO_SEG(0x00011800C8000500ull) + ((block_id) & 1) * 0x1000000ull;
163 #define CVMX_SRIOX_IMSG_VPORT_THR(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000500ull) + ((block_id) & 1) * 0x1000000ull)
171 	return CVMX_ADD_IO_SEG(0x00011800C80003E0ull) + ((block_id) & 1) * 0x1000000ull;
174 #define CVMX_SRIOX_INT2_ENABLE(block_id) (CVMX_ADD_IO_SEG(0x00011800C80003E0ull) + ((block_id) & 1) * 0x1000000ull)
182 	return CVMX_ADD_IO_SEG(0x00011800C80003E8ull) + ((block_id) & 1) * 0x1000000ull;
185 #define CVMX_SRIOX_INT2_REG(block_id) (CVMX_ADD_IO_SEG(0x00011800C80003E8ull) + ((block_id) & 1) * 0x1000000ull)
193 	return CVMX_ADD_IO_SEG(0x00011800C8000110ull) + ((block_id) & 1) * 0x1000000ull;
196 #define CVMX_SRIOX_INT_ENABLE(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000110ull) + ((block_id) & 1) * 0x1000000ull)
204 	return CVMX_ADD_IO_SEG(0x00011800C8000120ull) + ((block_id) & 1) * 0x1000000ull;
207 #define CVMX_SRIOX_INT_INFO0(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000120ull) + ((block_id) & 1) * 0x1000000ull)
215 	return CVMX_ADD_IO_SEG(0x00011800C8000128ull) + ((block_id) & 1) * 0x1000000ull;
218 #define CVMX_SRIOX_INT_INFO1(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000128ull) + ((block_id) & 1) * 0x1000000ull)
226 	return CVMX_ADD_IO_SEG(0x00011800C8000130ull) + ((block_id) & 1) * 0x1000000ull;
229 #define CVMX_SRIOX_INT_INFO2(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000130ull) + ((block_id) & 1) * 0x1000000ull)
237 	return CVMX_ADD_IO_SEG(0x00011800C8000138ull) + ((block_id) & 1) * 0x1000000ull;
240 #define CVMX_SRIOX_INT_INFO3(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000138ull) + ((block_id) & 1) * 0x1000000ull)
248 	return CVMX_ADD_IO_SEG(0x00011800C8000118ull) + ((block_id) & 1) * 0x1000000ull;
251 #define CVMX_SRIOX_INT_REG(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000118ull) + ((block_id) & 1) * 0x1000000ull)
259 	return CVMX_ADD_IO_SEG(0x00011800C80003F8ull) + ((block_id) & 1) * 0x1000000ull;
262 #define CVMX_SRIOX_IP_FEATURE(block_id) (CVMX_ADD_IO_SEG(0x00011800C80003F8ull) + ((block_id) & 1) * 0x1000000ull)
270 	return CVMX_ADD_IO_SEG(0x00011800C8000390ull) + ((block_id) & 1) * 0x1000000ull;
273 #define CVMX_SRIOX_MAC_BUFFERS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000390ull) + ((block_id) & 1) * 0x1000000ull)
281 	return CVMX_ADD_IO_SEG(0x00011800C8000158ull) + ((block_id) & 1) * 0x1000000ull;
284 #define CVMX_SRIOX_MAINT_OP(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000158ull) + ((block_id) & 1) * 0x1000000ull)
292 	return CVMX_ADD_IO_SEG(0x00011800C8000160ull) + ((block_id) & 1) * 0x1000000ull;
295 #define CVMX_SRIOX_MAINT_RD_DATA(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000160ull) + ((block_id) & 1) * 0x1000000ull)
303 	return CVMX_ADD_IO_SEG(0x00011800C8000240ull) + ((block_id) & 1) * 0x1000000ull;
306 #define CVMX_SRIOX_MCE_TX_CTL(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000240ull) + ((block_id) & 1) * 0x1000000ull)
314 	return CVMX_ADD_IO_SEG(0x00011800C8000168ull) + ((block_id) & 1) * 0x1000000ull;
317 #define CVMX_SRIOX_MEM_OP_CTRL(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000168ull) + ((block_id) & 1) * 0x1000000ull)
325 	return CVMX_ADD_IO_SEG(0x00011800C8000488ull) + (((offset) & 1) + ((block_id) & 1) * 0x40000ull) * 64;
328 #define CVMX_SRIOX_OMSG_CTRLX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000488ull) + (((offset) & 1) + ((block_id) & 1) * 0x40000ull) * 64)
336 	return CVMX_ADD_IO_SEG(0x00011800C80004B0ull) + (((offset) & 1) + ((block_id) & 1) * 0x40000ull) * 64;
339 #define CVMX_SRIOX_OMSG_DONE_COUNTSX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C80004B0ull) + (((offset) & 1) + ((block_id) & 1) * 0x40000ull) * 64)
347 	return CVMX_ADD_IO_SEG(0x00011800C8000498ull) + (((offset) & 1) + ((block_id) & 1) * 0x40000ull) * 64;
350 #define CVMX_SRIOX_OMSG_FMP_MRX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000498ull) + (((offset) & 1) + ((block_id) & 1) * 0x40000ull) * 64)
358 	return CVMX_ADD_IO_SEG(0x00011800C80004A0ull) + (((offset) & 1) + ((block_id) & 1) * 0x40000ull) * 64;
361 #define CVMX_SRIOX_OMSG_NMP_MRX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C80004A0ull) + (((offset) & 1) + ((block_id) & 1) * 0x40000ull) * 64)
369 	return CVMX_ADD_IO_SEG(0x00011800C8000480ull) + (((offset) & 1) + ((block_id) & 1) * 0x40000ull) * 64;
372 #define CVMX_SRIOX_OMSG_PORTX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000480ull) + (((offset) & 1) + ((block_id) & 1) * 0x40000ull) * 64)
380 	return CVMX_ADD_IO_SEG(0x00011800C80004F8ull) + ((block_id) & 1) * 0x1000000ull;
383 #define CVMX_SRIOX_OMSG_SILO_THR(block_id) (CVMX_ADD_IO_SEG(0x00011800C80004F8ull) + ((block_id) & 1) * 0x1000000ull)
391 	return CVMX_ADD_IO_SEG(0x00011800C8000490ull) + (((offset) & 1) + ((block_id) & 1) * 0x40000ull) * 64;
394 #define CVMX_SRIOX_OMSG_SP_MRX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000490ull) + (((offset) & 1) + ((block_id) & 1) * 0x40000ull) * 64)
402 	return CVMX_ADD_IO_SEG(0x00011800C80003C0ull) + (((offset) & 3) + ((block_id) & 1) * 0x200000ull) * 8;
405 #define CVMX_SRIOX_PRIOX_IN_USE(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C80003C0ull) + (((offset) & 3) + ((block_id) & 1) * 0x200000ull) * 8)
413 	return CVMX_ADD_IO_SEG(0x00011800C8000308ull) + ((block_id) & 1) * 0x1000000ull;
416 #define CVMX_SRIOX_RX_BELL(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000308ull) + ((block_id) & 1) * 0x1000000ull)
424 	return CVMX_ADD_IO_SEG(0x00011800C8000300ull) + ((block_id) & 1) * 0x1000000ull;
427 #define CVMX_SRIOX_RX_BELL_SEQ(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000300ull) + ((block_id) & 1) * 0x1000000ull)
435 	return CVMX_ADD_IO_SEG(0x00011800C8000380ull) + ((block_id) & 1) * 0x1000000ull;
438 #define CVMX_SRIOX_RX_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000380ull) + ((block_id) & 1) * 0x1000000ull)
446 	return CVMX_ADD_IO_SEG(0x00011800C8000180ull) + (((offset) & 15) + ((block_id) & 1) * 0x200000ull) * 8;
449 #define CVMX_SRIOX_S2M_TYPEX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000180ull) + (((offset) & 15) + ((block_id) & 1) * 0x200000ull) * 8)
457 	return CVMX_ADD_IO_SEG(0x00011800C8000278ull) + ((block_id) & 1) * 0x1000000ull;
460 #define CVMX_SRIOX_SEQ(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000278ull) + ((block_id) & 1) * 0x1000000ull)
468 	return CVMX_ADD_IO_SEG(0x00011800C8000100ull) + ((block_id) & 1) * 0x1000000ull;
471 #define CVMX_SRIOX_STATUS_REG(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000100ull) + ((block_id) & 1) * 0x1000000ull)
479 	return CVMX_ADD_IO_SEG(0x00011800C8000178ull) + ((block_id) & 1) * 0x1000000ull;
482 #define CVMX_SRIOX_TAG_CTRL(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000178ull) + ((block_id) & 1) * 0x1000000ull)
490 	return CVMX_ADD_IO_SEG(0x00011800C8000150ull) + ((block_id) & 1) * 0x1000000ull;
493 #define CVMX_SRIOX_TLP_CREDITS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000150ull) + ((block_id) & 1) * 0x1000000ull)
501 	return CVMX_ADD_IO_SEG(0x00011800C8000280ull) + ((block_id) & 1) * 0x1000000ull;
504 #define CVMX_SRIOX_TX_BELL(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000280ull) + ((block_id) & 1) * 0x1000000ull)
512 	return CVMX_ADD_IO_SEG(0x00011800C8000288ull) + ((block_id) & 1) * 0x1000000ull;
515 #define CVMX_SRIOX_TX_BELL_INFO(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000288ull) + ((block_id) & 1) * 0x1000000ull)
523 	return CVMX_ADD_IO_SEG(0x00011800C8000170ull) + ((block_id) & 1) * 0x1000000ull;
526 #define CVMX_SRIOX_TX_CTRL(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000170ull) + ((block_id) & 1) * 0x1000000ull)
534 	return CVMX_ADD_IO_SEG(0x00011800C80003F0ull) + ((block_id) & 1) * 0x1000000ull;
537 #define CVMX_SRIOX_TX_EMPHASIS(block_id) (CVMX_ADD_IO_SEG(0x00011800C80003F0ull) + ((block_id) & 1) * 0x1000000ull)
545 	return CVMX_ADD_IO_SEG(0x00011800C8000388ull) + ((block_id) & 1) * 0x1000000ull;
548 #define CVMX_SRIOX_TX_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000388ull) + ((block_id) & 1) * 0x1000000ull)
556 	return CVMX_ADD_IO_SEG(0x00011800C8000340ull) + ((block_id) & 1) * 0x1000000ull;
559 #define CVMX_SRIOX_WR_DONE_COUNTS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000340ull) + ((block_id) & 1) * 0x1000000ull)