contrib/octeon-sdk/cvmx-pescx-defs.h

56 static inline uint64_t CVMX_PESCX_BIST_STATUS(unsigned long block_id)
59 	      (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
60 	      (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id <= 1)))))
61 		cvmx_warn("CVMX_PESCX_BIST_STATUS(%lu) is invalid on this chip\n", block_id);
62 	return CVMX_ADD_IO_SEG(0x00011800C8000018ull) + ((block_id) & 1) * 0x8000000ull;
65 #define CVMX_PESCX_BIST_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000018ull) + ((block_id) & 1) * 0x8000000ull)
68 static inline uint64_t CVMX_PESCX_BIST_STATUS2(unsigned long block_id)
71 	      (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
72 	      (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id <= 1)))))
73 		cvmx_warn("CVMX_PESCX_BIST_STATUS2(%lu) is invalid on this chip\n", block_id);
74 	return CVMX_ADD_IO_SEG(0x00011800C8000418ull) + ((block_id) & 1) * 0x8000000ull;
77 #define CVMX_PESCX_BIST_STATUS2(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000418ull) + ((block_id) & 1) * 0x8000000ull)
80 static inline uint64_t CVMX_PESCX_CFG_RD(unsigned long block_id)
83 	      (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
84 	      (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id <= 1)))))
85 		cvmx_warn("CVMX_PESCX_CFG_RD(%lu) is invalid on this chip\n", block_id);
86 	return CVMX_ADD_IO_SEG(0x00011800C8000030ull) + ((block_id) & 1) * 0x8000000ull;
89 #define CVMX_PESCX_CFG_RD(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000030ull) + ((block_id) & 1) * 0x8000000ull)
92 static inline uint64_t CVMX_PESCX_CFG_WR(unsigned long block_id)
95 	      (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
96 	      (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id <= 1)))))
97 		cvmx_warn("CVMX_PESCX_CFG_WR(%lu) is invalid on this chip\n", block_id);
98 	return CVMX_ADD_IO_SEG(0x00011800C8000028ull) + ((block_id) & 1) * 0x8000000ull;
101 #define CVMX_PESCX_CFG_WR(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000028ull) + ((block_id) & 1) * 0x8000000ull)
104 static inline uint64_t CVMX_PESCX_CPL_LUT_VALID(unsigned long block_id)
107 	      (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
108 	      (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id <= 1)))))
109 		cvmx_warn("CVMX_PESCX_CPL_LUT_VALID(%lu) is invalid on this chip\n", block_id);
110 	return CVMX_ADD_IO_SEG(0x00011800C8000098ull) + ((block_id) & 1) * 0x8000000ull;
113 #define CVMX_PESCX_CPL_LUT_VALID(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000098ull) + ((block_id) & 1) * 0x8000000ull)
116 static inline uint64_t CVMX_PESCX_CTL_STATUS(unsigned long block_id)
119 	      (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
120 	      (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id <= 1)))))
121 		cvmx_warn("CVMX_PESCX_CTL_STATUS(%lu) is invalid on this chip\n", block_id);
122 	return CVMX_ADD_IO_SEG(0x00011800C8000000ull) + ((block_id) & 1) * 0x8000000ull;
125 #define CVMX_PESCX_CTL_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000000ull) + ((block_id) & 1) * 0x8000000ull)
128 static inline uint64_t CVMX_PESCX_CTL_STATUS2(unsigned long block_id)
131 	      (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
132 	      (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id <= 1)))))
133 		cvmx_warn("CVMX_PESCX_CTL_STATUS2(%lu) is invalid on this chip\n", block_id);
134 	return CVMX_ADD_IO_SEG(0x00011800C8000400ull) + ((block_id) & 1) * 0x8000000ull;
137 #define CVMX_PESCX_CTL_STATUS2(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000400ull) + ((block_id) & 1) * 0x8000000ull)
140 static inline uint64_t CVMX_PESCX_DBG_INFO(unsigned long block_id)
143 	      (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
144 	      (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id <= 1)))))
145 		cvmx_warn("CVMX_PESCX_DBG_INFO(%lu) is invalid on this chip\n", block_id);
146 	return CVMX_ADD_IO_SEG(0x00011800C8000008ull) + ((block_id) & 1) * 0x8000000ull;
149 #define CVMX_PESCX_DBG_INFO(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000008ull) + ((block_id) & 1) * 0x8000000ull)
152 static inline uint64_t CVMX_PESCX_DBG_INFO_EN(unsigned long block_id)
155 	      (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
156 	      (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id <= 1)))))
157 		cvmx_warn("CVMX_PESCX_DBG_INFO_EN(%lu) is invalid on this chip\n", block_id);
158 	return CVMX_ADD_IO_SEG(0x00011800C80000A0ull) + ((block_id) & 1) * 0x8000000ull;
161 #define CVMX_PESCX_DBG_INFO_EN(block_id) (CVMX_ADD_IO_SEG(0x00011800C80000A0ull) + ((block_id) & 1) * 0x8000000ull)
164 static inline uint64_t CVMX_PESCX_DIAG_STATUS(unsigned long block_id)
167 	      (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
168 	      (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id <= 1)))))
169 		cvmx_warn("CVMX_PESCX_DIAG_STATUS(%lu) is invalid on this chip\n", block_id);
170 	return CVMX_ADD_IO_SEG(0x00011800C8000020ull) + ((block_id) & 1) * 0x8000000ull;
173 #define CVMX_PESCX_DIAG_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000020ull) + ((block_id) & 1) * 0x8000000ull)
176 static inline uint64_t CVMX_PESCX_P2N_BAR0_START(unsigned long block_id)
179 	      (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
180 	      (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id <= 1)))))
181 		cvmx_warn("CVMX_PESCX_P2N_BAR0_START(%lu) is invalid on this chip\n", block_id);
182 	return CVMX_ADD_IO_SEG(0x00011800C8000080ull) + ((block_id) & 1) * 0x8000000ull;
185 #define CVMX_PESCX_P2N_BAR0_START(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000080ull) + ((block_id) & 1) * 0x8000000ull)
188 static inline uint64_t CVMX_PESCX_P2N_BAR1_START(unsigned long block_id)
191 	      (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
192 	      (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id <= 1)))))
193 		cvmx_warn("CVMX_PESCX_P2N_BAR1_START(%lu) is invalid on this chip\n", block_id);
194 	return CVMX_ADD_IO_SEG(0x00011800C8000088ull) + ((block_id) & 1) * 0x8000000ull;
197 #define CVMX_PESCX_P2N_BAR1_START(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000088ull) + ((block_id) & 1) * 0x8000000ull)
200 static inline uint64_t CVMX_PESCX_P2N_BAR2_START(unsigned long block_id)
203 	      (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
204 	      (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id <= 1)))))
205 		cvmx_warn("CVMX_PESCX_P2N_BAR2_START(%lu) is invalid on this chip\n", block_id);
206 	return CVMX_ADD_IO_SEG(0x00011800C8000090ull) + ((block_id) & 1) * 0x8000000ull;
209 #define CVMX_PESCX_P2N_BAR2_START(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000090ull) + ((block_id) & 1) * 0x8000000ull)
212 static inline uint64_t CVMX_PESCX_P2P_BARX_END(unsigned long offset, unsigned long block_id)
215 	      (OCTEON_IS_MODEL(OCTEON_CN52XX) && (((offset <= 3)) && ((block_id <= 1)))) ||
216 	      (OCTEON_IS_MODEL(OCTEON_CN56XX) && (((offset <= 3)) && ((block_id <= 1))))))
217 		cvmx_warn("CVMX_PESCX_P2P_BARX_END(%lu,%lu) is invalid on this chip\n", offset, block_id);
218 	return CVMX_ADD_IO_SEG(0x00011800C8000048ull) + (((offset) & 3) + ((block_id) & 1) * 0x800000ull) * 16;
221 #define CVMX_PESCX_P2P_BARX_END(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000048ull) + (((offset) & 3) + ((block_id) & 1) * 0x800000ull) * 16)
224 static inline uint64_t CVMX_PESCX_P2P_BARX_START(unsigned long offset, unsigned long block_id)
227 	      (OCTEON_IS_MODEL(OCTEON_CN52XX) && (((offset <= 3)) && ((block_id <= 1)))) ||
228 	      (OCTEON_IS_MODEL(OCTEON_CN56XX) && (((offset <= 3)) && ((block_id <= 1))))))
229 		cvmx_warn("CVMX_PESCX_P2P_BARX_START(%lu,%lu) is invalid on this chip\n", offset, block_id);
230 	return CVMX_ADD_IO_SEG(0x00011800C8000040ull) + (((offset) & 3) + ((block_id) & 1) * 0x800000ull) * 16;
233 #define CVMX_PESCX_P2P_BARX_START(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000040ull) + (((offset) & 3) + ((block_id) & 1) * 0x800000ull) * 16)
236 static inline uint64_t CVMX_PESCX_TLP_CREDITS(unsigned long block_id)
239 	      (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
240 	      (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id <= 1)))))
241 		cvmx_warn("CVMX_PESCX_TLP_CREDITS(%lu) is invalid on this chip\n", block_id);
242 	return CVMX_ADD_IO_SEG(0x00011800C8000038ull) + ((block_id) & 1) * 0x8000000ull;
245 #define CVMX_PESCX_TLP_CREDITS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000038ull) + ((block_id) & 1) * 0x8000000ull)