Lines Matching refs:block_id
56 static inline uint64_t CVMX_PCIEEPX_CFG000(unsigned long block_id)
59 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
60 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
61 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
62 cvmx_warn("CVMX_PCIEEPX_CFG000(%lu) is invalid on this chip\n", block_id);
66 #define CVMX_PCIEEPX_CFG000(block_id) (0x0000000000000000ull)
69 static inline uint64_t CVMX_PCIEEPX_CFG001(unsigned long block_id)
72 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
73 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
74 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
75 cvmx_warn("CVMX_PCIEEPX_CFG001(%lu) is invalid on this chip\n", block_id);
79 #define CVMX_PCIEEPX_CFG001(block_id) (0x0000000000000004ull)
82 static inline uint64_t CVMX_PCIEEPX_CFG002(unsigned long block_id)
85 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
86 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
87 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
88 cvmx_warn("CVMX_PCIEEPX_CFG002(%lu) is invalid on this chip\n", block_id);
92 #define CVMX_PCIEEPX_CFG002(block_id) (0x0000000000000008ull)
95 static inline uint64_t CVMX_PCIEEPX_CFG003(unsigned long block_id)
98 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
99 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
100 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
101 cvmx_warn("CVMX_PCIEEPX_CFG003(%lu) is invalid on this chip\n", block_id);
105 #define CVMX_PCIEEPX_CFG003(block_id) (0x000000000000000Cull)
108 static inline uint64_t CVMX_PCIEEPX_CFG004(unsigned long block_id)
111 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
112 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
113 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
114 cvmx_warn("CVMX_PCIEEPX_CFG004(%lu) is invalid on this chip\n", block_id);
118 #define CVMX_PCIEEPX_CFG004(block_id) (0x0000000000000010ull)
121 static inline uint64_t CVMX_PCIEEPX_CFG004_MASK(unsigned long block_id)
124 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
125 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
126 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
127 cvmx_warn("CVMX_PCIEEPX_CFG004_MASK(%lu) is invalid on this chip\n", block_id);
131 #define CVMX_PCIEEPX_CFG004_MASK(block_id) (0x0000000080000010ull)
134 static inline uint64_t CVMX_PCIEEPX_CFG005(unsigned long block_id)
137 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
138 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
139 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
140 cvmx_warn("CVMX_PCIEEPX_CFG005(%lu) is invalid on this chip\n", block_id);
144 #define CVMX_PCIEEPX_CFG005(block_id) (0x0000000000000014ull)
147 static inline uint64_t CVMX_PCIEEPX_CFG005_MASK(unsigned long block_id)
150 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
151 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
152 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
153 cvmx_warn("CVMX_PCIEEPX_CFG005_MASK(%lu) is invalid on this chip\n", block_id);
157 #define CVMX_PCIEEPX_CFG005_MASK(block_id) (0x0000000080000014ull)
160 static inline uint64_t CVMX_PCIEEPX_CFG006(unsigned long block_id)
163 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
164 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
165 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
166 cvmx_warn("CVMX_PCIEEPX_CFG006(%lu) is invalid on this chip\n", block_id);
170 #define CVMX_PCIEEPX_CFG006(block_id) (0x0000000000000018ull)
173 static inline uint64_t CVMX_PCIEEPX_CFG006_MASK(unsigned long block_id)
176 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
177 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
178 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
179 cvmx_warn("CVMX_PCIEEPX_CFG006_MASK(%lu) is invalid on this chip\n", block_id);
183 #define CVMX_PCIEEPX_CFG006_MASK(block_id) (0x0000000080000018ull)
186 static inline uint64_t CVMX_PCIEEPX_CFG007(unsigned long block_id)
189 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
190 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
191 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
192 cvmx_warn("CVMX_PCIEEPX_CFG007(%lu) is invalid on this chip\n", block_id);
196 #define CVMX_PCIEEPX_CFG007(block_id) (0x000000000000001Cull)
199 static inline uint64_t CVMX_PCIEEPX_CFG007_MASK(unsigned long block_id)
202 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
203 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
204 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
205 cvmx_warn("CVMX_PCIEEPX_CFG007_MASK(%lu) is invalid on this chip\n", block_id);
209 #define CVMX_PCIEEPX_CFG007_MASK(block_id) (0x000000008000001Cull)
212 static inline uint64_t CVMX_PCIEEPX_CFG008(unsigned long block_id)
215 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
216 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
217 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
218 cvmx_warn("CVMX_PCIEEPX_CFG008(%lu) is invalid on this chip\n", block_id);
222 #define CVMX_PCIEEPX_CFG008(block_id) (0x0000000000000020ull)
225 static inline uint64_t CVMX_PCIEEPX_CFG008_MASK(unsigned long block_id)
228 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
229 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
230 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
231 cvmx_warn("CVMX_PCIEEPX_CFG008_MASK(%lu) is invalid on this chip\n", block_id);
235 #define CVMX_PCIEEPX_CFG008_MASK(block_id) (0x0000000080000020ull)
238 static inline uint64_t CVMX_PCIEEPX_CFG009(unsigned long block_id)
241 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
242 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
243 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
244 cvmx_warn("CVMX_PCIEEPX_CFG009(%lu) is invalid on this chip\n", block_id);
248 #define CVMX_PCIEEPX_CFG009(block_id) (0x0000000000000024ull)
251 static inline uint64_t CVMX_PCIEEPX_CFG009_MASK(unsigned long block_id)
254 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
255 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
256 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
257 cvmx_warn("CVMX_PCIEEPX_CFG009_MASK(%lu) is invalid on this chip\n", block_id);
261 #define CVMX_PCIEEPX_CFG009_MASK(block_id) (0x0000000080000024ull)
264 static inline uint64_t CVMX_PCIEEPX_CFG010(unsigned long block_id)
267 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
268 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
269 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
270 cvmx_warn("CVMX_PCIEEPX_CFG010(%lu) is invalid on this chip\n", block_id);
274 #define CVMX_PCIEEPX_CFG010(block_id) (0x0000000000000028ull)
277 static inline uint64_t CVMX_PCIEEPX_CFG011(unsigned long block_id)
280 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
281 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
282 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
283 cvmx_warn("CVMX_PCIEEPX_CFG011(%lu) is invalid on this chip\n", block_id);
287 #define CVMX_PCIEEPX_CFG011(block_id) (0x000000000000002Cull)
290 static inline uint64_t CVMX_PCIEEPX_CFG012(unsigned long block_id)
293 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
294 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
295 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
296 cvmx_warn("CVMX_PCIEEPX_CFG012(%lu) is invalid on this chip\n", block_id);
300 #define CVMX_PCIEEPX_CFG012(block_id) (0x0000000000000030ull)
303 static inline uint64_t CVMX_PCIEEPX_CFG012_MASK(unsigned long block_id)
306 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
307 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
308 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
309 cvmx_warn("CVMX_PCIEEPX_CFG012_MASK(%lu) is invalid on this chip\n", block_id);
313 #define CVMX_PCIEEPX_CFG012_MASK(block_id) (0x0000000080000030ull)
316 static inline uint64_t CVMX_PCIEEPX_CFG013(unsigned long block_id)
319 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
320 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
321 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
322 cvmx_warn("CVMX_PCIEEPX_CFG013(%lu) is invalid on this chip\n", block_id);
326 #define CVMX_PCIEEPX_CFG013(block_id) (0x0000000000000034ull)
329 static inline uint64_t CVMX_PCIEEPX_CFG015(unsigned long block_id)
332 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
333 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
334 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
335 cvmx_warn("CVMX_PCIEEPX_CFG015(%lu) is invalid on this chip\n", block_id);
339 #define CVMX_PCIEEPX_CFG015(block_id) (0x000000000000003Cull)
342 static inline uint64_t CVMX_PCIEEPX_CFG016(unsigned long block_id)
345 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
346 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
347 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
348 cvmx_warn("CVMX_PCIEEPX_CFG016(%lu) is invalid on this chip\n", block_id);
352 #define CVMX_PCIEEPX_CFG016(block_id) (0x0000000000000040ull)
355 static inline uint64_t CVMX_PCIEEPX_CFG017(unsigned long block_id)
358 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
359 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
360 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
361 cvmx_warn("CVMX_PCIEEPX_CFG017(%lu) is invalid on this chip\n", block_id);
365 #define CVMX_PCIEEPX_CFG017(block_id) (0x0000000000000044ull)
368 static inline uint64_t CVMX_PCIEEPX_CFG020(unsigned long block_id)
371 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
372 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
373 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
374 cvmx_warn("CVMX_PCIEEPX_CFG020(%lu) is invalid on this chip\n", block_id);
378 #define CVMX_PCIEEPX_CFG020(block_id) (0x0000000000000050ull)
381 static inline uint64_t CVMX_PCIEEPX_CFG021(unsigned long block_id)
384 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
385 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
386 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
387 cvmx_warn("CVMX_PCIEEPX_CFG021(%lu) is invalid on this chip\n", block_id);
391 #define CVMX_PCIEEPX_CFG021(block_id) (0x0000000000000054ull)
394 static inline uint64_t CVMX_PCIEEPX_CFG022(unsigned long block_id)
397 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
398 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
399 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
400 cvmx_warn("CVMX_PCIEEPX_CFG022(%lu) is invalid on this chip\n", block_id);
404 #define CVMX_PCIEEPX_CFG022(block_id) (0x0000000000000058ull)
407 static inline uint64_t CVMX_PCIEEPX_CFG023(unsigned long block_id)
410 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
411 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
412 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
413 cvmx_warn("CVMX_PCIEEPX_CFG023(%lu) is invalid on this chip\n", block_id);
417 #define CVMX_PCIEEPX_CFG023(block_id) (0x000000000000005Cull)
420 static inline uint64_t CVMX_PCIEEPX_CFG028(unsigned long block_id)
423 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
424 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
425 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
426 cvmx_warn("CVMX_PCIEEPX_CFG028(%lu) is invalid on this chip\n", block_id);
430 #define CVMX_PCIEEPX_CFG028(block_id) (0x0000000000000070ull)
433 static inline uint64_t CVMX_PCIEEPX_CFG029(unsigned long block_id)
436 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
437 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
438 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
439 cvmx_warn("CVMX_PCIEEPX_CFG029(%lu) is invalid on this chip\n", block_id);
443 #define CVMX_PCIEEPX_CFG029(block_id) (0x0000000000000074ull)
446 static inline uint64_t CVMX_PCIEEPX_CFG030(unsigned long block_id)
449 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
450 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
451 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
452 cvmx_warn("CVMX_PCIEEPX_CFG030(%lu) is invalid on this chip\n", block_id);
456 #define CVMX_PCIEEPX_CFG030(block_id) (0x0000000000000078ull)
459 static inline uint64_t CVMX_PCIEEPX_CFG031(unsigned long block_id)
462 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
463 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
464 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
465 cvmx_warn("CVMX_PCIEEPX_CFG031(%lu) is invalid on this chip\n", block_id);
469 #define CVMX_PCIEEPX_CFG031(block_id) (0x000000000000007Cull)
472 static inline uint64_t CVMX_PCIEEPX_CFG032(unsigned long block_id)
475 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
476 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
477 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
478 cvmx_warn("CVMX_PCIEEPX_CFG032(%lu) is invalid on this chip\n", block_id);
482 #define CVMX_PCIEEPX_CFG032(block_id) (0x0000000000000080ull)
485 static inline uint64_t CVMX_PCIEEPX_CFG033(unsigned long block_id)
488 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
489 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
490 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
491 cvmx_warn("CVMX_PCIEEPX_CFG033(%lu) is invalid on this chip\n", block_id);
495 #define CVMX_PCIEEPX_CFG033(block_id) (0x0000000000000084ull)
498 static inline uint64_t CVMX_PCIEEPX_CFG034(unsigned long block_id)
501 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
502 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
503 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
504 cvmx_warn("CVMX_PCIEEPX_CFG034(%lu) is invalid on this chip\n", block_id);
508 #define CVMX_PCIEEPX_CFG034(block_id) (0x0000000000000088ull)
511 static inline uint64_t CVMX_PCIEEPX_CFG037(unsigned long block_id)
514 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
515 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
516 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
517 cvmx_warn("CVMX_PCIEEPX_CFG037(%lu) is invalid on this chip\n", block_id);
521 #define CVMX_PCIEEPX_CFG037(block_id) (0x0000000000000094ull)
524 static inline uint64_t CVMX_PCIEEPX_CFG038(unsigned long block_id)
527 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
528 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
529 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
530 cvmx_warn("CVMX_PCIEEPX_CFG038(%lu) is invalid on this chip\n", block_id);
534 #define CVMX_PCIEEPX_CFG038(block_id) (0x0000000000000098ull)
537 static inline uint64_t CVMX_PCIEEPX_CFG039(unsigned long block_id)
540 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
541 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
542 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
543 cvmx_warn("CVMX_PCIEEPX_CFG039(%lu) is invalid on this chip\n", block_id);
547 #define CVMX_PCIEEPX_CFG039(block_id) (0x000000000000009Cull)
550 static inline uint64_t CVMX_PCIEEPX_CFG040(unsigned long block_id)
553 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
554 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
555 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
556 cvmx_warn("CVMX_PCIEEPX_CFG040(%lu) is invalid on this chip\n", block_id);
560 #define CVMX_PCIEEPX_CFG040(block_id) (0x00000000000000A0ull)
563 static inline uint64_t CVMX_PCIEEPX_CFG041(unsigned long block_id)
566 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
567 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
568 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
569 cvmx_warn("CVMX_PCIEEPX_CFG041(%lu) is invalid on this chip\n", block_id);
573 #define CVMX_PCIEEPX_CFG041(block_id) (0x00000000000000A4ull)
576 static inline uint64_t CVMX_PCIEEPX_CFG042(unsigned long block_id)
579 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
580 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
581 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
582 cvmx_warn("CVMX_PCIEEPX_CFG042(%lu) is invalid on this chip\n", block_id);
586 #define CVMX_PCIEEPX_CFG042(block_id) (0x00000000000000A8ull)
589 static inline uint64_t CVMX_PCIEEPX_CFG064(unsigned long block_id)
592 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
593 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
594 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
595 cvmx_warn("CVMX_PCIEEPX_CFG064(%lu) is invalid on this chip\n", block_id);
599 #define CVMX_PCIEEPX_CFG064(block_id) (0x0000000000000100ull)
602 static inline uint64_t CVMX_PCIEEPX_CFG065(unsigned long block_id)
605 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
606 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
607 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
608 cvmx_warn("CVMX_PCIEEPX_CFG065(%lu) is invalid on this chip\n", block_id);
612 #define CVMX_PCIEEPX_CFG065(block_id) (0x0000000000000104ull)
615 static inline uint64_t CVMX_PCIEEPX_CFG066(unsigned long block_id)
618 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
619 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
620 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
621 cvmx_warn("CVMX_PCIEEPX_CFG066(%lu) is invalid on this chip\n", block_id);
625 #define CVMX_PCIEEPX_CFG066(block_id) (0x0000000000000108ull)
628 static inline uint64_t CVMX_PCIEEPX_CFG067(unsigned long block_id)
631 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
632 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
633 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
634 cvmx_warn("CVMX_PCIEEPX_CFG067(%lu) is invalid on this chip\n", block_id);
638 #define CVMX_PCIEEPX_CFG067(block_id) (0x000000000000010Cull)
641 static inline uint64_t CVMX_PCIEEPX_CFG068(unsigned long block_id)
644 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
645 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
646 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
647 cvmx_warn("CVMX_PCIEEPX_CFG068(%lu) is invalid on this chip\n", block_id);
651 #define CVMX_PCIEEPX_CFG068(block_id) (0x0000000000000110ull)
654 static inline uint64_t CVMX_PCIEEPX_CFG069(unsigned long block_id)
657 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
658 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
659 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
660 cvmx_warn("CVMX_PCIEEPX_CFG069(%lu) is invalid on this chip\n", block_id);
664 #define CVMX_PCIEEPX_CFG069(block_id) (0x0000000000000114ull)
667 static inline uint64_t CVMX_PCIEEPX_CFG070(unsigned long block_id)
670 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
671 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
672 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
673 cvmx_warn("CVMX_PCIEEPX_CFG070(%lu) is invalid on this chip\n", block_id);
677 #define CVMX_PCIEEPX_CFG070(block_id) (0x0000000000000118ull)
680 static inline uint64_t CVMX_PCIEEPX_CFG071(unsigned long block_id)
683 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
684 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
685 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
686 cvmx_warn("CVMX_PCIEEPX_CFG071(%lu) is invalid on this chip\n", block_id);
690 #define CVMX_PCIEEPX_CFG071(block_id) (0x000000000000011Cull)
693 static inline uint64_t CVMX_PCIEEPX_CFG072(unsigned long block_id)
696 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
697 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
698 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
699 cvmx_warn("CVMX_PCIEEPX_CFG072(%lu) is invalid on this chip\n", block_id);
703 #define CVMX_PCIEEPX_CFG072(block_id) (0x0000000000000120ull)
706 static inline uint64_t CVMX_PCIEEPX_CFG073(unsigned long block_id)
709 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
710 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
711 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
712 cvmx_warn("CVMX_PCIEEPX_CFG073(%lu) is invalid on this chip\n", block_id);
716 #define CVMX_PCIEEPX_CFG073(block_id) (0x0000000000000124ull)
719 static inline uint64_t CVMX_PCIEEPX_CFG074(unsigned long block_id)
722 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
723 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
724 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
725 cvmx_warn("CVMX_PCIEEPX_CFG074(%lu) is invalid on this chip\n", block_id);
729 #define CVMX_PCIEEPX_CFG074(block_id) (0x0000000000000128ull)
732 static inline uint64_t CVMX_PCIEEPX_CFG448(unsigned long block_id)
735 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
736 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
737 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
738 cvmx_warn("CVMX_PCIEEPX_CFG448(%lu) is invalid on this chip\n", block_id);
742 #define CVMX_PCIEEPX_CFG448(block_id) (0x0000000000000700ull)
745 static inline uint64_t CVMX_PCIEEPX_CFG449(unsigned long block_id)
748 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
749 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
750 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
751 cvmx_warn("CVMX_PCIEEPX_CFG449(%lu) is invalid on this chip\n", block_id);
755 #define CVMX_PCIEEPX_CFG449(block_id) (0x0000000000000704ull)
758 static inline uint64_t CVMX_PCIEEPX_CFG450(unsigned long block_id)
761 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
762 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
763 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
764 cvmx_warn("CVMX_PCIEEPX_CFG450(%lu) is invalid on this chip\n", block_id);
768 #define CVMX_PCIEEPX_CFG450(block_id) (0x0000000000000708ull)
771 static inline uint64_t CVMX_PCIEEPX_CFG451(unsigned long block_id)
774 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
775 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
776 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
777 cvmx_warn("CVMX_PCIEEPX_CFG451(%lu) is invalid on this chip\n", block_id);
781 #define CVMX_PCIEEPX_CFG451(block_id) (0x000000000000070Cull)
784 static inline uint64_t CVMX_PCIEEPX_CFG452(unsigned long block_id)
787 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
788 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
789 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
790 cvmx_warn("CVMX_PCIEEPX_CFG452(%lu) is invalid on this chip\n", block_id);
794 #define CVMX_PCIEEPX_CFG452(block_id) (0x0000000000000710ull)
797 static inline uint64_t CVMX_PCIEEPX_CFG453(unsigned long block_id)
800 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
801 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
802 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
803 cvmx_warn("CVMX_PCIEEPX_CFG453(%lu) is invalid on this chip\n", block_id);
807 #define CVMX_PCIEEPX_CFG453(block_id) (0x0000000000000714ull)
810 static inline uint64_t CVMX_PCIEEPX_CFG454(unsigned long block_id)
813 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
814 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
815 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
816 cvmx_warn("CVMX_PCIEEPX_CFG454(%lu) is invalid on this chip\n", block_id);
820 #define CVMX_PCIEEPX_CFG454(block_id) (0x0000000000000718ull)
823 static inline uint64_t CVMX_PCIEEPX_CFG455(unsigned long block_id)
826 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
827 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
828 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
829 cvmx_warn("CVMX_PCIEEPX_CFG455(%lu) is invalid on this chip\n", block_id);
833 #define CVMX_PCIEEPX_CFG455(block_id) (0x000000000000071Cull)
836 static inline uint64_t CVMX_PCIEEPX_CFG456(unsigned long block_id)
839 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
840 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
841 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
842 cvmx_warn("CVMX_PCIEEPX_CFG456(%lu) is invalid on this chip\n", block_id);
846 #define CVMX_PCIEEPX_CFG456(block_id) (0x0000000000000720ull)
849 static inline uint64_t CVMX_PCIEEPX_CFG458(unsigned long block_id)
852 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
853 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
854 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
855 cvmx_warn("CVMX_PCIEEPX_CFG458(%lu) is invalid on this chip\n", block_id);
859 #define CVMX_PCIEEPX_CFG458(block_id) (0x0000000000000728ull)
862 static inline uint64_t CVMX_PCIEEPX_CFG459(unsigned long block_id)
865 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
866 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
867 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
868 cvmx_warn("CVMX_PCIEEPX_CFG459(%lu) is invalid on this chip\n", block_id);
872 #define CVMX_PCIEEPX_CFG459(block_id) (0x000000000000072Cull)
875 static inline uint64_t CVMX_PCIEEPX_CFG460(unsigned long block_id)
878 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
879 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
880 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
881 cvmx_warn("CVMX_PCIEEPX_CFG460(%lu) is invalid on this chip\n", block_id);
885 #define CVMX_PCIEEPX_CFG460(block_id) (0x0000000000000730ull)
888 static inline uint64_t CVMX_PCIEEPX_CFG461(unsigned long block_id)
891 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
892 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
893 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
894 cvmx_warn("CVMX_PCIEEPX_CFG461(%lu) is invalid on this chip\n", block_id);
898 #define CVMX_PCIEEPX_CFG461(block_id) (0x0000000000000734ull)
901 static inline uint64_t CVMX_PCIEEPX_CFG462(unsigned long block_id)
904 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
905 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
906 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
907 cvmx_warn("CVMX_PCIEEPX_CFG462(%lu) is invalid on this chip\n", block_id);
911 #define CVMX_PCIEEPX_CFG462(block_id) (0x0000000000000738ull)
914 static inline uint64_t CVMX_PCIEEPX_CFG463(unsigned long block_id)
917 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
918 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
919 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
920 cvmx_warn("CVMX_PCIEEPX_CFG463(%lu) is invalid on this chip\n", block_id);
924 #define CVMX_PCIEEPX_CFG463(block_id) (0x000000000000073Cull)
927 static inline uint64_t CVMX_PCIEEPX_CFG464(unsigned long block_id)
930 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
931 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
932 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
933 cvmx_warn("CVMX_PCIEEPX_CFG464(%lu) is invalid on this chip\n", block_id);
937 #define CVMX_PCIEEPX_CFG464(block_id) (0x0000000000000740ull)
940 static inline uint64_t CVMX_PCIEEPX_CFG465(unsigned long block_id)
943 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
944 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
945 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
946 cvmx_warn("CVMX_PCIEEPX_CFG465(%lu) is invalid on this chip\n", block_id);
950 #define CVMX_PCIEEPX_CFG465(block_id) (0x0000000000000744ull)
953 static inline uint64_t CVMX_PCIEEPX_CFG466(unsigned long block_id)
956 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
957 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
958 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
959 cvmx_warn("CVMX_PCIEEPX_CFG466(%lu) is invalid on this chip\n", block_id);
963 #define CVMX_PCIEEPX_CFG466(block_id) (0x0000000000000748ull)
966 static inline uint64_t CVMX_PCIEEPX_CFG467(unsigned long block_id)
969 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
970 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
971 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
972 cvmx_warn("CVMX_PCIEEPX_CFG467(%lu) is invalid on this chip\n", block_id);
976 #define CVMX_PCIEEPX_CFG467(block_id) (0x000000000000074Cull)
979 static inline uint64_t CVMX_PCIEEPX_CFG468(unsigned long block_id)
982 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
983 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
984 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
985 cvmx_warn("CVMX_PCIEEPX_CFG468(%lu) is invalid on this chip\n", block_id);
989 #define CVMX_PCIEEPX_CFG468(block_id) (0x0000000000000750ull)
992 static inline uint64_t CVMX_PCIEEPX_CFG490(unsigned long block_id)
995 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
996 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
997 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
998 cvmx_warn("CVMX_PCIEEPX_CFG490(%lu) is invalid on this chip\n", block_id);
1002 #define CVMX_PCIEEPX_CFG490(block_id) (0x00000000000007A8ull)
1005 static inline uint64_t CVMX_PCIEEPX_CFG491(unsigned long block_id)
1008 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
1009 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
1010 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
1011 cvmx_warn("CVMX_PCIEEPX_CFG491(%lu) is invalid on this chip\n", block_id);
1015 #define CVMX_PCIEEPX_CFG491(block_id) (0x00000000000007ACull)
1018 static inline uint64_t CVMX_PCIEEPX_CFG492(unsigned long block_id)
1021 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
1022 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
1023 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
1024 cvmx_warn("CVMX_PCIEEPX_CFG492(%lu) is invalid on this chip\n", block_id);
1028 #define CVMX_PCIEEPX_CFG492(block_id) (0x00000000000007B0ull)
1031 static inline uint64_t CVMX_PCIEEPX_CFG515(unsigned long block_id)
1034 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
1035 cvmx_warn("CVMX_PCIEEPX_CFG515(%lu) is invalid on this chip\n", block_id);
1039 #define CVMX_PCIEEPX_CFG515(block_id) (0x000000000000080Cull)
1042 static inline uint64_t CVMX_PCIEEPX_CFG516(unsigned long block_id)
1045 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
1046 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
1047 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
1048 cvmx_warn("CVMX_PCIEEPX_CFG516(%lu) is invalid on this chip\n", block_id);
1052 #define CVMX_PCIEEPX_CFG516(block_id) (0x0000000000000810ull)
1055 static inline uint64_t CVMX_PCIEEPX_CFG517(unsigned long block_id)
1058 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
1059 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
1060 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
1061 cvmx_warn("CVMX_PCIEEPX_CFG517(%lu) is invalid on this chip\n", block_id);
1065 #define CVMX_PCIEEPX_CFG517(block_id) (0x0000000000000814ull)