contrib/octeon-sdk/cvmx-mdio.h

397     cvmx_smix_cmd_t smi_cmd;
403     smi_cmd.u64 = 0;
404     smi_cmd.s.phy_op = MDIO_CLAUSE_22_READ;
405     smi_cmd.s.phy_adr = phy_id;
406     smi_cmd.s.reg_adr = location;
407     cvmx_write_csr(CVMX_SMIX_CMD(bus_id), smi_cmd.u64);
449      cvmx_smix_cmd_t smi_cmd;
459     smi_cmd.u64 = 0;
460     smi_cmd.s.phy_op = MDIO_CLAUSE_22_WRITE;
461     smi_cmd.s.phy_adr = phy_id;
462     smi_cmd.s.reg_adr = location;
463     cvmx_write_csr(CVMX_SMIX_CMD(bus_id), smi_cmd.u64);
489     cvmx_smix_cmd_t smi_cmd;
502     smi_cmd.u64 = 0;
503     smi_cmd.s.phy_op = MDIO_CLAUSE_45_ADDRESS;
504     smi_cmd.s.phy_adr = phy_id;
505     smi_cmd.s.reg_adr = device;
506     cvmx_write_csr(CVMX_SMIX_CMD(bus_id), smi_cmd.u64);
515     smi_cmd.u64 = 0;
516     smi_cmd.s.phy_op = MDIO_CLAUSE_45_READ;
517     smi_cmd.s.phy_adr = phy_id;
518     smi_cmd.s.reg_adr = device;
519     cvmx_write_csr(CVMX_SMIX_CMD(bus_id), smi_cmd.u64);
554     cvmx_smix_cmd_t smi_cmd;
566     smi_cmd.u64 = 0;
567     smi_cmd.s.phy_op = MDIO_CLAUSE_45_ADDRESS;
568     smi_cmd.s.phy_adr = phy_id;
569     smi_cmd.s.reg_adr = device;
570     cvmx_write_csr(CVMX_SMIX_CMD(bus_id), smi_cmd.u64);
580     smi_cmd.u64 = 0;
581     smi_cmd.s.phy_op = MDIO_CLAUSE_45_WRITE;
582     smi_cmd.s.phy_adr = phy_id;
583     smi_cmd.s.reg_adr = device;
584     cvmx_write_csr(CVMX_SMIX_CMD(bus_id), smi_cmd.u64);