Lines Matching refs:CVMX_ADD_IO_SEG
61 return CVMX_ADD_IO_SEG(0x0001180080800030ull);
64 #define CVMX_L2C_BIG_CTL (CVMX_ADD_IO_SEG(0x0001180080800030ull))
72 return CVMX_ADD_IO_SEG(0x00011800808007F8ull);
75 #define CVMX_L2C_BST (CVMX_ADD_IO_SEG(0x00011800808007F8ull))
83 return CVMX_ADD_IO_SEG(0x00011800800007F8ull);
86 #define CVMX_L2C_BST0 (CVMX_ADD_IO_SEG(0x00011800800007F8ull))
94 return CVMX_ADD_IO_SEG(0x00011800800007F0ull);
97 #define CVMX_L2C_BST1 (CVMX_ADD_IO_SEG(0x00011800800007F0ull))
105 return CVMX_ADD_IO_SEG(0x00011800800007E8ull);
108 #define CVMX_L2C_BST2 (CVMX_ADD_IO_SEG(0x00011800800007E8ull))
116 return CVMX_ADD_IO_SEG(0x0001180080C007F8ull);
119 #define CVMX_L2C_BST_MEMX(block_id) (CVMX_ADD_IO_SEG(0x0001180080C007F8ull))
127 return CVMX_ADD_IO_SEG(0x0001180080A007F0ull);
130 #define CVMX_L2C_BST_TDTX(block_id) (CVMX_ADD_IO_SEG(0x0001180080A007F0ull))
138 return CVMX_ADD_IO_SEG(0x0001180080A007F8ull);
141 #define CVMX_L2C_BST_TTGX(block_id) (CVMX_ADD_IO_SEG(0x0001180080A007F8ull))
149 return CVMX_ADD_IO_SEG(0x0001180080000000ull);
152 #define CVMX_L2C_CFG (CVMX_ADD_IO_SEG(0x0001180080000000ull))
160 return CVMX_ADD_IO_SEG(0x0001180080940000ull) + ((offset) & 16383) * 8;
163 #define CVMX_L2C_COP0_MAPX(offset) (CVMX_ADD_IO_SEG(0x0001180080940000ull) + ((offset) & 16383) * 8)
171 return CVMX_ADD_IO_SEG(0x0001180080800000ull);
174 #define CVMX_L2C_CTL (CVMX_ADD_IO_SEG(0x0001180080800000ull))
182 return CVMX_ADD_IO_SEG(0x0001180080000030ull);
185 #define CVMX_L2C_DBG (CVMX_ADD_IO_SEG(0x0001180080000030ull))
193 return CVMX_ADD_IO_SEG(0x0001180080000050ull);
196 #define CVMX_L2C_DUT (CVMX_ADD_IO_SEG(0x0001180080000050ull))
204 return CVMX_ADD_IO_SEG(0x0001180080E00000ull) + ((offset) & 2047) * 8;
207 #define CVMX_L2C_DUT_MAPX(offset) (CVMX_ADD_IO_SEG(0x0001180080E00000ull) + ((offset) & 2047) * 8)
215 return CVMX_ADD_IO_SEG(0x0001180080A007E0ull);
218 #define CVMX_L2C_ERR_TDTX(block_id) (CVMX_ADD_IO_SEG(0x0001180080A007E0ull))
226 return CVMX_ADD_IO_SEG(0x0001180080A007E8ull);
229 #define CVMX_L2C_ERR_TTGX(block_id) (CVMX_ADD_IO_SEG(0x0001180080A007E8ull))
237 return CVMX_ADD_IO_SEG(0x0001180080C007F0ull);
240 #define CVMX_L2C_ERR_VBFX(block_id) (CVMX_ADD_IO_SEG(0x0001180080C007F0ull))
248 return CVMX_ADD_IO_SEG(0x00011800808007D8ull);
251 #define CVMX_L2C_ERR_XMC (CVMX_ADD_IO_SEG(0x00011800808007D8ull))
259 return CVMX_ADD_IO_SEG(0x00011800800000C8ull);
262 #define CVMX_L2C_GRPWRR0 (CVMX_ADD_IO_SEG(0x00011800800000C8ull))
270 return CVMX_ADD_IO_SEG(0x00011800800000D0ull);
273 #define CVMX_L2C_GRPWRR1 (CVMX_ADD_IO_SEG(0x00011800800000D0ull))
281 return CVMX_ADD_IO_SEG(0x0001180080000100ull);
284 #define CVMX_L2C_INT_EN (CVMX_ADD_IO_SEG(0x0001180080000100ull))
292 return CVMX_ADD_IO_SEG(0x0001180080800020ull);
295 #define CVMX_L2C_INT_ENA (CVMX_ADD_IO_SEG(0x0001180080800020ull))
303 return CVMX_ADD_IO_SEG(0x0001180080800018ull);
306 #define CVMX_L2C_INT_REG (CVMX_ADD_IO_SEG(0x0001180080800018ull))
314 return CVMX_ADD_IO_SEG(0x00011800800000F8ull);
317 #define CVMX_L2C_INT_STAT (CVMX_ADD_IO_SEG(0x00011800800000F8ull))
325 return CVMX_ADD_IO_SEG(0x0001180080800420ull);
328 #define CVMX_L2C_IOCX_PFC(block_id) (CVMX_ADD_IO_SEG(0x0001180080800420ull))
336 return CVMX_ADD_IO_SEG(0x0001180080800428ull);
339 #define CVMX_L2C_IORX_PFC(block_id) (CVMX_ADD_IO_SEG(0x0001180080800428ull))
347 return CVMX_ADD_IO_SEG(0x0001180080000058ull);
350 #define CVMX_L2C_LCKBASE (CVMX_ADD_IO_SEG(0x0001180080000058ull))
358 return CVMX_ADD_IO_SEG(0x0001180080000060ull);
361 #define CVMX_L2C_LCKOFF (CVMX_ADD_IO_SEG(0x0001180080000060ull))
369 return CVMX_ADD_IO_SEG(0x0001180080000038ull);
372 #define CVMX_L2C_LFB0 (CVMX_ADD_IO_SEG(0x0001180080000038ull))
380 return CVMX_ADD_IO_SEG(0x0001180080000040ull);
383 #define CVMX_L2C_LFB1 (CVMX_ADD_IO_SEG(0x0001180080000040ull))
391 return CVMX_ADD_IO_SEG(0x0001180080000048ull);
394 #define CVMX_L2C_LFB2 (CVMX_ADD_IO_SEG(0x0001180080000048ull))
402 return CVMX_ADD_IO_SEG(0x00011800800000B8ull);
405 #define CVMX_L2C_LFB3 (CVMX_ADD_IO_SEG(0x00011800800000B8ull))
413 return CVMX_ADD_IO_SEG(0x00011800800000D8ull);
416 #define CVMX_L2C_OOB (CVMX_ADD_IO_SEG(0x00011800800000D8ull))
424 return CVMX_ADD_IO_SEG(0x00011800800000E0ull);
427 #define CVMX_L2C_OOB1 (CVMX_ADD_IO_SEG(0x00011800800000E0ull))
435 return CVMX_ADD_IO_SEG(0x00011800800000E8ull);
438 #define CVMX_L2C_OOB2 (CVMX_ADD_IO_SEG(0x00011800800000E8ull))
446 return CVMX_ADD_IO_SEG(0x00011800800000F0ull);
449 #define CVMX_L2C_OOB3 (CVMX_ADD_IO_SEG(0x00011800800000F0ull))
461 return CVMX_ADD_IO_SEG(0x0001180080000090ull);
464 #define CVMX_L2C_PFCTL (CVMX_ADD_IO_SEG(0x0001180080000090ull))
478 return CVMX_ADD_IO_SEG(0x0001180080000098ull) + ((offset) & 3) * 8;
481 #define CVMX_L2C_PFCX(offset) (CVMX_ADD_IO_SEG(0x0001180080000098ull) + ((offset) & 3) * 8)
489 return CVMX_ADD_IO_SEG(0x00011800800000C0ull);
492 #define CVMX_L2C_PPGRP (CVMX_ADD_IO_SEG(0x00011800800000C0ull))
500 return CVMX_ADD_IO_SEG(0x0001180080880200ull);
503 #define CVMX_L2C_QOS_IOBX(block_id) (CVMX_ADD_IO_SEG(0x0001180080880200ull))
511 return CVMX_ADD_IO_SEG(0x0001180080880000ull) + ((offset) & 7) * 8;
514 #define CVMX_L2C_QOS_PPX(offset) (CVMX_ADD_IO_SEG(0x0001180080880000ull) + ((offset) & 7) * 8)
522 return CVMX_ADD_IO_SEG(0x0001180080800008ull);
525 #define CVMX_L2C_QOS_WGT (CVMX_ADD_IO_SEG(0x0001180080800008ull))
533 return CVMX_ADD_IO_SEG(0x0001180080800410ull);
536 #define CVMX_L2C_RSCX_PFC(block_id) (CVMX_ADD_IO_SEG(0x0001180080800410ull))
544 return CVMX_ADD_IO_SEG(0x0001180080800418ull);
547 #define CVMX_L2C_RSDX_PFC(block_id) (CVMX_ADD_IO_SEG(0x0001180080800418ull))
555 return CVMX_ADD_IO_SEG(0x0001180080000068ull);
558 #define CVMX_L2C_SPAR0 (CVMX_ADD_IO_SEG(0x0001180080000068ull))
566 return CVMX_ADD_IO_SEG(0x0001180080000070ull);
569 #define CVMX_L2C_SPAR1 (CVMX_ADD_IO_SEG(0x0001180080000070ull))
577 return CVMX_ADD_IO_SEG(0x0001180080000078ull);
580 #define CVMX_L2C_SPAR2 (CVMX_ADD_IO_SEG(0x0001180080000078ull))
588 return CVMX_ADD_IO_SEG(0x0001180080000080ull);
591 #define CVMX_L2C_SPAR3 (CVMX_ADD_IO_SEG(0x0001180080000080ull))
599 return CVMX_ADD_IO_SEG(0x0001180080000088ull);
602 #define CVMX_L2C_SPAR4 (CVMX_ADD_IO_SEG(0x0001180080000088ull))
610 return CVMX_ADD_IO_SEG(0x0001180080A00018ull);
613 #define CVMX_L2C_TADX_ECC0(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00018ull))
621 return CVMX_ADD_IO_SEG(0x0001180080A00020ull);
624 #define CVMX_L2C_TADX_ECC1(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00020ull))
632 return CVMX_ADD_IO_SEG(0x0001180080A00000ull);
635 #define CVMX_L2C_TADX_IEN(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00000ull))
643 return CVMX_ADD_IO_SEG(0x0001180080A00028ull);
646 #define CVMX_L2C_TADX_INT(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00028ull))
654 return CVMX_ADD_IO_SEG(0x0001180080A00400ull);
657 #define CVMX_L2C_TADX_PFC0(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00400ull))
665 return CVMX_ADD_IO_SEG(0x0001180080A00408ull);
668 #define CVMX_L2C_TADX_PFC1(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00408ull))
676 return CVMX_ADD_IO_SEG(0x0001180080A00410ull);
679 #define CVMX_L2C_TADX_PFC2(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00410ull))
687 return CVMX_ADD_IO_SEG(0x0001180080A00418ull);
690 #define CVMX_L2C_TADX_PFC3(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00418ull))
698 return CVMX_ADD_IO_SEG(0x0001180080A00008ull);
701 #define CVMX_L2C_TADX_PRF(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00008ull))
709 return CVMX_ADD_IO_SEG(0x0001180080A00010ull);
712 #define CVMX_L2C_TADX_TAG(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00010ull))
720 return CVMX_ADD_IO_SEG(0x00011800808007E0ull);
723 #define CVMX_L2C_VER_ID (CVMX_ADD_IO_SEG(0x00011800808007E0ull))
731 return CVMX_ADD_IO_SEG(0x00011800808007F0ull);
734 #define CVMX_L2C_VER_IOB (CVMX_ADD_IO_SEG(0x00011800808007F0ull))
742 return CVMX_ADD_IO_SEG(0x00011800808007D0ull);
745 #define CVMX_L2C_VER_MSC (CVMX_ADD_IO_SEG(0x00011800808007D0ull))
753 return CVMX_ADD_IO_SEG(0x00011800808007E8ull);
756 #define CVMX_L2C_VER_PP (CVMX_ADD_IO_SEG(0x00011800808007E8ull))
764 return CVMX_ADD_IO_SEG(0x00011800808C0200ull);
767 #define CVMX_L2C_VIRTID_IOBX(block_id) (CVMX_ADD_IO_SEG(0x00011800808C0200ull))
775 return CVMX_ADD_IO_SEG(0x00011800808C0000ull) + ((offset) & 7) * 8;
778 #define CVMX_L2C_VIRTID_PPX(offset) (CVMX_ADD_IO_SEG(0x00011800808C0000ull) + ((offset) & 7) * 8)
786 return CVMX_ADD_IO_SEG(0x0001180080800010ull);
789 #define CVMX_L2C_VRT_CTL (CVMX_ADD_IO_SEG(0x0001180080800010ull))
797 return CVMX_ADD_IO_SEG(0x0001180080900000ull) + ((offset) & 1023) * 8;
800 #define CVMX_L2C_VRT_MEMX(offset) (CVMX_ADD_IO_SEG(0x0001180080900000ull) + ((offset) & 1023) * 8)
808 return CVMX_ADD_IO_SEG(0x0001180080840200ull);
811 #define CVMX_L2C_WPAR_IOBX(block_id) (CVMX_ADD_IO_SEG(0x0001180080840200ull))
819 return CVMX_ADD_IO_SEG(0x0001180080840000ull) + ((offset) & 7) * 8;
822 #define CVMX_L2C_WPAR_PPX(offset) (CVMX_ADD_IO_SEG(0x0001180080840000ull) + ((offset) & 7) * 8)
830 return CVMX_ADD_IO_SEG(0x0001180080800400ull);
833 #define CVMX_L2C_XMCX_PFC(block_id) (CVMX_ADD_IO_SEG(0x0001180080800400ull))
841 return CVMX_ADD_IO_SEG(0x0001180080800028ull);
844 #define CVMX_L2C_XMC_CMD (CVMX_ADD_IO_SEG(0x0001180080800028ull))
852 return CVMX_ADD_IO_SEG(0x0001180080800408ull);
855 #define CVMX_L2C_XMDX_PFC(block_id) (CVMX_ADD_IO_SEG(0x0001180080800408ull))