contrib/octeon-sdk/cvmx-helper-xaui.c

85  * Probe a XAUI interface and determine the number of ports
86  * connected to it. The XAUI interface should still be down
89  * @param interface Interface to probe
91  * @return Number of ports on the interface. Zero to disable.
93 int __cvmx_helper_xaui_probe(int interface)
110     /* Due to errata GMX-700 on CN56XXp1.x and CN52XXp1.x, the interface
113     mode.u64 = cvmx_read_csr(CVMX_GMXX_INF_MODE(interface));
115     cvmx_write_csr(CVMX_GMXX_INF_MODE(interface), mode.u64);
117     __cvmx_helper_setup_gmx(interface, 1);
120         all of the PKO packet ports for this interface to the XAUI. This allows
131         pko_mem_port_ptrs.s.eid = interface*4;
132         pko_mem_port_ptrs.s.pid = interface*16 + i;
137     gmx_hg2_control.u64 = cvmx_read_csr(CVMX_GMXX_HG2_CONTROL(interface));
147  * Bringup and enable a XAUI interface. After this call packet
151  * @param interface Interface to bring up
155 int __cvmx_helper_xaui_enable(int interface)
166     xauiMiscCtl.u64 = cvmx_read_csr(CVMX_PCSXX_MISC_CTL_REG(interface));
168     cvmx_write_csr (CVMX_PCSXX_MISC_CTL_REG(interface), xauiMiscCtl.u64);
171     cvmx_write_csr(CVMX_GMXX_RXX_INT_EN(0,interface), 0x0);
172     cvmx_write_csr(CVMX_GMXX_TX_INT_EN(interface), 0x0);
173     cvmx_write_csr(CVMX_PCSXX_INT_EN_REG(interface), 0x0);
178     gmxXauiTxCtl.u64 = cvmx_read_csr (CVMX_GMXX_TX_XAUI_CTL(interface));
181     cvmx_write_csr (CVMX_GMXX_TX_XAUI_CTL(interface), gmxXauiTxCtl.u64);
184     xauiCtl.u64 = cvmx_read_csr (CVMX_PCSXX_CONTROL1_REG(interface));
187     cvmx_write_csr (CVMX_PCSXX_CONTROL1_REG(interface), xauiCtl.u64);
190     if (CVMX_WAIT_FOR_FIELD64(CVMX_PCSXX_CONTROL1_REG(interface), cvmx_pcsxx_control1_reg_t, reset, ==, 0, 10000))
193     if (CVMX_WAIT_FOR_FIELD64(CVMX_PCSXX_10GBX_STATUS_REG(interface), cvmx_pcsxx_10gbx_status_reg_t, alignd, ==, 1, 10000))
196     if (CVMX_WAIT_FOR_FIELD64(CVMX_GMXX_RX_XAUI_CTL(interface), cvmx_gmxx_rx_xaui_ctl_t, status, ==, 0, 10000))
200     gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(0, interface));
202     cvmx_write_csr(CVMX_GMXX_PRTX_CFG(0, interface), gmx_cfg.u64);
205     if (CVMX_WAIT_FOR_FIELD64(CVMX_GMXX_PRTX_CFG(0, interface), cvmx_gmxx_prtx_cfg_t, rx_idle, ==, 1, 10000))
208     if (CVMX_WAIT_FOR_FIELD64(CVMX_GMXX_PRTX_CFG(0, interface), cvmx_gmxx_prtx_cfg_t, tx_idle, ==, 1, 10000))
212     gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(0, interface));
216     cvmx_write_csr(CVMX_GMXX_TX_PRTS(interface), 1);
217     cvmx_write_csr(CVMX_GMXX_TXX_SLOT(0, interface), 512);
218     cvmx_write_csr(CVMX_GMXX_TXX_BURST(0, interface), 8192);
219     cvmx_write_csr(CVMX_GMXX_PRTX_CFG(0, interface), gmx_cfg.u64);
222     if (CVMX_WAIT_FOR_FIELD64(CVMX_PCSXX_STATUS1_REG(interface), cvmx_pcsxx_status1_reg_t, rcv_lnk, ==, 1, 10000))
224     if (CVMX_WAIT_FOR_FIELD64(CVMX_PCSXX_STATUS2_REG(interface), cvmx_pcsxx_status2_reg_t, xmtflt, ==, 0, 10000))
226     if (CVMX_WAIT_FOR_FIELD64(CVMX_PCSXX_STATUS2_REG(interface), cvmx_pcsxx_status2_reg_t, rcvflt, ==, 0, 10000))
231     cvmx_write_csr (CVMX_PCSXX_MISC_CTL_REG(interface), xauiMiscCtl.u64);
233     gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(0, interface));
235     cvmx_write_csr(CVMX_GMXX_PRTX_CFG(0, interface), gmx_cfg.u64);
237     link_info = cvmx_helper_link_autoconf(cvmx_helper_get_ipd_port(interface, 0));
257     int interface = cvmx_helper_get_interface_num(ipd_port);
263     gmxx_tx_xaui_ctl.u64 = cvmx_read_csr(CVMX_GMXX_TX_XAUI_CTL(interface));
264     gmxx_rx_xaui_ctl.u64 = cvmx_read_csr(CVMX_GMXX_RX_XAUI_CTL(interface));
265     pcsxx_status1_reg.u64 = cvmx_read_csr(CVMX_PCSXX_STATUS1_REG(interface));
279         cvmx_write_csr (CVMX_GMXX_RXX_INT_EN(0,interface), 0x0);
280         cvmx_write_csr (CVMX_GMXX_TX_INT_EN(interface), 0x0);
281         cvmx_write_csr (CVMX_PCSXX_INT_EN_REG(interface), 0x0);
302     int interface = cvmx_helper_get_interface_num(ipd_port);
306     gmxx_tx_xaui_ctl.u64 = cvmx_read_csr(CVMX_GMXX_TX_XAUI_CTL(interface));
307     gmxx_rx_xaui_ctl.u64 = cvmx_read_csr(CVMX_GMXX_RX_XAUI_CTL(interface));
318     return __cvmx_helper_xaui_enable(interface);
338     int interface = cvmx_helper_get_interface_num(ipd_port);
343     pcsxx_control1_reg.u64 = cvmx_read_csr(CVMX_PCSXX_CONTROL1_REG(interface));
345     cvmx_write_csr(CVMX_PCSXX_CONTROL1_REG(interface), pcsxx_control1_reg.u64);
348     gmxx_xaui_ext_loopback.u64 = cvmx_read_csr(CVMX_GMXX_XAUI_EXT_LOOPBACK(interface));
350     cvmx_write_csr(CVMX_GMXX_XAUI_EXT_LOOPBACK(interface), gmxx_xaui_ext_loopback.u64);
353     return __cvmx_helper_xaui_enable(interface);