contrib/octeon-sdk/cvmx-helper-sgmii.c

93  * @param index     Index of prot on the interface
97 static int __cvmx_helper_sgmii_hardware_init_one_time(int interface, int index)
105     gmxx_prtx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
107     cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmxx_prtx_cfg.u64);
112     pcsx_miscx_ctl_reg.u64 = cvmx_read_csr(CVMX_PCSX_MISCX_CTL_REG(index, interface));
113     pcsx_linkx_timer_count_reg.u64 = cvmx_read_csr(CVMX_PCSX_LINKX_TIMER_COUNT_REG(index, interface));
124     cvmx_write_csr(CVMX_PCSX_LINKX_TIMER_COUNT_REG(index, interface), pcsx_linkx_timer_count_reg.u64);
136         pcsx_anx_adv_reg.u64 = cvmx_read_csr(CVMX_PCSX_ANX_ADV_REG(index, interface));
141         cvmx_write_csr(CVMX_PCSX_ANX_ADV_REG(index, interface), pcsx_anx_adv_reg.u64);
149             pcsx_sgmx_an_adv_reg.u64 = cvmx_read_csr(CVMX_PCSX_SGMX_AN_ADV_REG(index, interface));
153             cvmx_write_csr(CVMX_PCSX_SGMX_AN_ADV_REG(index, interface), pcsx_sgmx_an_adv_reg.u64);
170  * @param index     Index of prot on the interface
174 static int __cvmx_helper_sgmii_hardware_init_link(int interface, int index)
183     control_reg.u64 = cvmx_read_csr(CVMX_PCSX_MRX_CONTROL_REG(index, interface));
187         cvmx_write_csr(CVMX_PCSX_MRX_CONTROL_REG(index, interface), control_reg.u64);
188         if (CVMX_WAIT_FOR_FIELD64(CVMX_PCSX_MRX_CONTROL_REG(index, interface), cvmx_pcsx_mrx_control_reg_t, reset, ==, 0, 10000))
190             cvmx_dprintf("SGMII%d: Timeout waiting for port %d to finish reset\n", interface, index);
199     cvmx_write_csr(CVMX_PCSX_MRX_CONTROL_REG(index, interface), control_reg.u64);
205         CVMX_WAIT_FOR_FIELD64(CVMX_PCSX_MRX_STATUS_REG(index, interface), cvmx_pcsx_mrx_status_reg_t, an_cpt, ==, 1, 10000))
207         //cvmx_dprintf("SGMII%d: Port %d link timeout\n", interface, index);
220  * @param index     Index of prot on the interface
225 static int __cvmx_helper_sgmii_hardware_init_link_speed(int interface, int index, cvmx_helper_link_info_t link_info)
232     gmxx_prtx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
235     cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmxx_prtx_cfg.u64);
238     if (CVMX_WAIT_FOR_FIELD64(CVMX_GMXX_PRTX_CFG(index, interface), cvmx_gmxx_prtx_cfg_t, rx_idle, ==, 1, 10000) ||
239         CVMX_WAIT_FOR_FIELD64(CVMX_GMXX_PRTX_CFG(index, interface), cvmx_gmxx_prtx_cfg_t, tx_idle, ==, 1, 10000))
241         cvmx_dprintf("SGMII%d: Timeout waiting for port %d to be idle\n", interface, index);
246     gmxx_prtx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
249     pcsx_miscx_ctl_reg.u64 = cvmx_read_csr(CVMX_PCSX_MISCX_CTL_REG(index, interface));
266             cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 64);
267             cvmx_write_csr(CVMX_GMXX_TXX_BURST(index, interface), 0);
274             cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 64);
275             cvmx_write_csr(CVMX_GMXX_TXX_BURST(index, interface), 0);
282             cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 512);
284                 cvmx_write_csr(CVMX_GMXX_TXX_BURST(index, interface), 0); // full duplex
286                 cvmx_write_csr(CVMX_GMXX_TXX_BURST(index, interface), 8192); // half duplex
293     cvmx_write_csr(CVMX_PCSX_MISCX_CTL_REG(index, interface), pcsx_miscx_ctl_reg.u64);
296     cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmxx_prtx_cfg.u64);
299     gmxx_prtx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
303     cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmxx_prtx_cfg.u64);
322     int index;
337     for (index=0; index<num_ports; index++)
339         int ipd_port = cvmx_helper_get_ipd_port(interface, index);
340         __cvmx_helper_sgmii_hardware_init_one_time(interface, index);
386     int index;
390     for (index=0; index<num_ports; index++)
393         gmxx_prtx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
395         cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmxx_prtx_cfg.u64);
417     int index = cvmx_helper_get_interface_index_num(ipd_port);
431     pcsx_mrx_control_reg.u64 = cvmx_read_csr(CVMX_PCSX_MRX_CONTROL_REG(index, interface));
442     pcsx_miscx_ctl_reg.u64 = cvmx_read_csr(CVMX_PCSX_MISCX_CTL_REG(index, interface));
457             pcsx_mrx_status_reg.u64 = cvmx_read_csr(CVMX_PCSX_MRX_STATUS_REG(index, interface));
460                 if (__cvmx_helper_sgmii_hardware_init_link(interface, index) != 0)
465             pcsx_anx_results_reg.u64 = cvmx_read_csr(CVMX_PCSX_ANX_RESULTS_REG(index, interface));
520     int index = cvmx_helper_get_interface_index_num(ipd_port);
521     __cvmx_helper_sgmii_hardware_init_link(interface, index);
522     return __cvmx_helper_sgmii_hardware_init_link_speed(interface, index, link_info);
542     int index = cvmx_helper_get_interface_index_num(ipd_port);
546     pcsx_mrx_control_reg.u64 = cvmx_read_csr(CVMX_PCSX_MRX_CONTROL_REG(index, interface));
548     cvmx_write_csr(CVMX_PCSX_MRX_CONTROL_REG(index, interface), pcsx_mrx_control_reg.u64);
550     pcsx_miscx_ctl_reg.u64 = cvmx_read_csr(CVMX_PCSX_MISCX_CTL_REG(index, interface));
552     cvmx_write_csr(CVMX_PCSX_MISCX_CTL_REG(index, interface), pcsx_miscx_ctl_reg.u64);
554     __cvmx_helper_sgmii_hardware_init_link(interface, index);