utils/TableGen/AsmWriterEmitter.cpp

36   std::map<const CodeGenInstruction*, AsmWriterInst*> CGIAWIMap;
37   std::vector<const CodeGenInstruction*> NumberedInstructions;
49   AsmWriterInst *getAsmWriterInstByID(unsigned ID) const {
51     std::map<const CodeGenInstruction*, AsmWriterInst*>::const_iterator I =
58                                  std::vector<unsigned> &InstOpsUsed) const;
143                           std::vector<unsigned> &InstOpsUsed) const {
154     const AsmWriterInst *Inst = getAsmWriterInstByID(i);
198       const AsmWriterInst *FirstInst =
215         const AsmWriterInst *OtherInst =
284   const char *MachineInstrClassName = isMC ? "MCInst" : "MachineInstr";
290             << "::printInstruction(const " << MachineInstrClassName
400   O<<"  static const uint32_t OpInfo[] = {\n";
412     O << "  static const uint"
425   O << "  const char AsmStrs[] = {\n";
523                        const std::vector<CodeGenRegister*> &Registers) {
527     const CodeGenRegister &Reg = *Registers[i];
561   O << "  static const char AsmStrs" << AltName << "[] = {\n";
565   O << "  static const uint32_t RegAsmOffset" << AltName << "[] = {";
578   const std::vector<CodeGenRegister*> &Registers =
587   "const char *" << Target.getName() << ClassName << "::";
603     O << "  const uint32_t *RegAsmOffset;\n"
604       << "  const char *AsmStrs;\n"
639   void addCond(const std::string &C) { Conds.push_back(C); }
702   bool operator==(const IAPrinter &RHS) {
715   bool operator()(const IAPrinter &RHS) {
784     const Record *R = *I;
787     const DagInit *DI = R->getValueAsDag("ResultInst");
788     const DefInit *Op = cast<DefInit>(DI->getOperator());
802       const CodeGenInstAlias *CGA = *II;
821         const CodeGenInstAlias::ResultOperand &RO = CGA->ResultOperands[i];
825           const Record *Rec = RO.getRecord();
900           << "::printAliasInstr(const MCInst"
951   O.indent(2) << "const char *AsmString;\n";