ARM/MCTargetDesc/ARMMCCodeEmitter.cpp

449   const MCOperand &MO1 = MI.getOperand(OpIdx + 1);
453   int32_t SImm = MO1.getImm();
743   const MCOperand &MO1 = MI.getOperand(OpIdx);
745   unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg());
879   const MCOperand &MO1 = MI.getOperand(OpIdx + 1);
881   unsigned Imm8 = MO1.getImm();
961   const MCOperand &MO1 = MI.getOperand(OpIdx+1);
964   unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg());
1011   const MCOperand &MO1 = MI.getOperand(OpIdx+1);
1012   unsigned Imm = MO1.getImm();
1032   const MCOperand &MO1 = MI.getOperand(OpIdx+1);
1033   bool isAdd = MO1.getImm() != 0;
1045   const MCOperand &MO1 = MI.getOperand(OpIdx+1);
1046   unsigned Imm = MO1.getImm();
1065   const MCOperand &MO1 = MI.getOperand(OpIdx+1);
1083   bool isImm = MO1.getReg() == 0;
1087     Imm8 = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg());
1097   const MCOperand &MO1 = MI.getOperand(OpIdx + 1);
1103   return MO1.getImm() & 0xff;
1114   const MCOperand &MO1 = MI.getOperand(OpIdx + 1);
1116   unsigned Imm5 = MO1.getImm();
1183   const MCOperand &MO1 = MI.getOperand(OpIdx + 1);
1192   unsigned Rs = MO1.getReg();
1228   const MCOperand &MO1 = MI.getOperand(OpIdx + 1);
1229   ARM_AM::ShiftOpc SOpc = ARM_AM::getSORegShOp(MO1.getImm());
1256   unsigned Offset = ARM_AM::getSORegOffset(MO1.getImm());
1265   const MCOperand &MO1 = MI.getOperand(OpNum);
1271   unsigned Value = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg());
1283   const MCOperand &MO1 = MI.getOperand(OpNum);
1287   unsigned Value = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg());
1304   const MCOperand &MO1 = MI.getOperand(OpNum);
1308   int32_t tmp = (int32_t)MO1.getImm();
1320   const MCOperand &MO1 = MI.getOperand(OpNum);
1324   int32_t tmp = (int32_t)MO1.getImm();
1345   const MCOperand &MO1 = MI.getOperand(OpIdx + 1);
1346   ARM_AM::ShiftOpc SOpc = ARM_AM::getSORegShOp(MO1.getImm());
1372   return Binary | ARM_AM::getSORegOffset(MO1.getImm()) << 7;