Lines Matching defs:const
28 const AArch64RegisterInfo RI;
29 const AArch64Subtarget &Subtarget;
31 explicit AArch64InstrInfo(const AArch64Subtarget &TM);
37 const TargetRegisterInfo &getRegisterInfo() const { return RI; }
39 const AArch64Subtarget &getSubTarget() const { return Subtarget; }
44 bool KillSrc) const;
49 const TargetRegisterClass *RC,
50 const TargetRegisterInfo *TRI) const;
54 const TargetRegisterClass *RC,
55 const TargetRegisterInfo *TRI) const;
60 bool AllowModify = false) const;
63 const SmallVectorImpl<MachineOperand> &Cond,
64 DebugLoc DL) const;
65 unsigned RemoveBranch(MachineBasicBlock &MBB) const;
66 bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
68 bool expandPostRAPseudo(MachineBasicBlock::iterator MI) const;
73 unsigned estimateRSStackLimit(MachineFunction &MF) const;
80 void getAddressConstraints(const MachineInstr &MI, int &AccessScale,
81 int &MinOffset, int &MaxOffset) const;
84 unsigned getInstSizeInBytes(const MachineInstr &MI) const;
86 unsigned getInstBundleLength(const MachineInstr &MI) const;
92 const AArch64InstrInfo &TII);
96 DebugLoc dl, const TargetInstrInfo &TII,
102 DebugLoc dl, const TargetInstrInfo &TII,