Lines Matching refs:trueop0

1458   rtx trueop0, trueop1;
1475 trueop0 = avoid_constant_pool_reference (op0);
1478 tem = simplify_const_binary_operation (code, mode, trueop0, trueop1);
1481 return simplify_binary_operation_1 (code, mode, op0, op1, trueop0, trueop1);
1491 rtx op0, rtx op1, rtx trueop0, rtx trueop1)
1706 if (rtx_equal_p (trueop0, trueop1)
1715 if (!HONOR_SIGNED_ZEROS (mode) && trueop0 == CONST0_RTX (mode))
1719 if (trueop0 == constm1_rtx)
1844 && trueop0 == const1_rtx
1983 if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
2098 if (rtx_equal_p (trueop0, trueop1)
2210 && (nonzero_bits (trueop0, mode) & ~INTVAL (trueop1)) == 0)
2212 if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0)
2330 if (trueop0 == CONST0_RTX (mode))
2333 return simplify_gen_binary (AND, mode, op1, trueop0);
2334 return trueop0;
2353 if (trueop0 == CONST0_RTX (mode)
2388 if (trueop0 == CONST0_RTX (mode))
2391 return simplify_gen_binary (AND, mode, op1, trueop0);
2392 return trueop0;
2408 if (trueop0 == CONST0_RTX (mode))
2411 return simplify_gen_binary (AND, mode, op1, trueop0);
2412 return trueop0;
2430 if (trueop0 == CONST0_RTX (mode))
2433 return simplify_gen_binary (AND, mode, op1, trueop0);
2434 return trueop0;
2450 if (trueop0 == CONST0_RTX (mode) && ! side_effects_p (op1))
2453 if (GET_CODE (trueop0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT
2454 && (unsigned HOST_WIDE_INT) INTVAL (trueop0) == GET_MODE_MASK (mode)
2463 if (trueop0 == CONST0_RTX (mode) && ! side_effects_p (op1))
2470 if (trueop0 == CONST0_RTX (mode) && ! side_effects_p (op1))
2495 if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
2509 if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
2519 if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
2529 if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
2546 gcc_assert (VECTOR_MODE_P (GET_MODE (trueop0)));
2547 gcc_assert (mode == GET_MODE_INNER (GET_MODE (trueop0)));
2552 if (GET_CODE (trueop0) == CONST_VECTOR)
2553 return CONST_VECTOR_ELT (trueop0, INTVAL (XVECEXP
2558 gcc_assert (VECTOR_MODE_P (GET_MODE (trueop0)));
2560 == GET_MODE_INNER (GET_MODE (trueop0)));
2563 if (GET_CODE (trueop0) == CONST_VECTOR)
2576 RTVEC_ELT (v, i) = CONST_VECTOR_ELT (trueop0,
2586 && GET_CODE (trueop0) == VEC_CONCAT)
2588 rtx vec = trueop0;
2613 enum machine_mode op0_mode = (GET_MODE (trueop0) != VOIDmode
2614 ? GET_MODE (trueop0)
2636 if ((GET_CODE (trueop0) == CONST_VECTOR
2637 || GET_CODE (trueop0) == CONST_INT
2638 || GET_CODE (trueop0) == CONST_DOUBLE)
2656 RTVEC_ELT (v, i) = trueop0;
2658 RTVEC_ELT (v, i) = CONST_VECTOR_ELT (trueop0, i);
3516 rtx tem, trueop0, trueop1;
3583 trueop0 = avoid_constant_pool_reference (op0);
3586 trueop0, trueop1);
3704 rtx trueop0;
3737 trueop0 = avoid_constant_pool_reference (op0);
3752 && ! ((REG_P (op0) || GET_CODE (trueop0) == CONST_INT)
3768 if (! HONOR_NANS (GET_MODE (trueop0))
3769 && rtx_equal_p (trueop0, trueop1)
3770 && ! side_effects_p (trueop0))
3775 else if (GET_CODE (trueop0) == CONST_DOUBLE
3777 && SCALAR_FLOAT_MODE_P (GET_MODE (trueop0)))
3781 REAL_VALUE_FROM_CONST_DOUBLE (d0, trueop0);
3815 && (GET_CODE (trueop0) == CONST_DOUBLE
3816 || GET_CODE (trueop0) == CONST_INT)
3825 if (GET_CODE (trueop0) == CONST_DOUBLE)
3827 l0u = l0s = CONST_DOUBLE_LOW (trueop0);
3828 h0u = h0s = CONST_DOUBLE_HIGH (trueop0);
3832 l0u = l0s = INTVAL (trueop0);
3949 tem = GET_CODE (trueop0) == FLOAT_EXTEND ? XEXP (trueop0, 0)
3950 : trueop0;
3971 tem = GET_CODE (trueop0) == FLOAT_EXTEND ? XEXP (trueop0, 0)
3972 : trueop0;
3990 tem = GET_CODE (trueop0) == FLOAT_EXTEND ? XEXP (trueop0, 0)
3991 : trueop0;