Lines Matching refs:subreg

124 set ((reg:DI 100) (sign_extend:DI ((subreg:SI (reg:DI 100)))))
128 set ((reg:DI 100) (sign_extend:DI ((subreg:SI (reg:DI 100)))))
154 set ((subreg:SI (reg:DI 100)) (..def1rhs..))
155 set ((reg:SI 10) (subreg:SI (reg:DI 100)))
161 set ((reg:DI 100) (sign_extend:DI ((subreg:SI (reg:DI 100)))))
171 (compare:CC (subreg:SI (reg:DI 100)) (...)))
196 set ((reg:DI 100) (sign_extend:DI ((subreg:SI (reg:DI 100)))))
224 set ((subreg:SI (reg:DI 100)) (..def3rhs..)) - Inserted
225 set ((reg:SI 10) (subreg:SI (reg:DI 100))) - Inserted
239 (compare:CC (subreg:SI (reg:DI 100)) (...)))
245 set ((reg:DI 100) (sign_extend:DI ((subreg:SI (reg:DI 100)))))
362 reference with the proper subreg of WIDEmode register and save
666 set (reg/subreg reg1) (sign/zero_extend:WIDEmode (reg/subreg reg2))
713 set (reg/subreg reg1) (sign/zero_extend: (...expr...)
759 set ((reg r) (sign/zero_extend (subreg:mode (reg r))))
770 rtx subreg, insn;
778 subreg = gen_lowpart_SUBREG (mode, reg);
780 extension = gen_rtx_SIGN_EXTEND (GET_MODE (reg), subreg);
782 extension = gen_rtx_ZERO_EXTEND (GET_MODE (reg), subreg);
805 (subreg:NARROWmode (reg:WIDEmode r2)))) */
830 (sign_extend:WIDEmode (subreg:NARROWmode (reg:WIDEmode r))) */
922 (subreg:NARROWmode (reg:WIDEmode r2))))
2424 set (subreg (dest_extension_reg)) (rhs)
2428 b. Replace every instance of dest_reg with the subreg.
2434 set (subreg (dest_extension_reg)) (dest_reg)
2457 rtx new_pseudo_reg, subreg;
2473 subreg = gen_lowpart_SUBREG (dest_mode, dest_extension_reg);
2480 /* Step b: Replace every instance of dest_reg with the subreg. */
2481 ref_copy = replace_rtx (ref_copy, dest_reg, subreg);
2499 emit_move_insn (subreg, dest_reg);
2532 emit_move_insn (dest_reg, subreg);
2737 rtx move_insn, *rtx_slot, subreg;
2862 subreg = gen_lowpart_SUBREG (source_extension_mode, dest_extension_reg);
2864 emit_move_insn (source_extension_reg, subreg);