contrib/gcc/recog.c

1 /* Subroutines used by or related to instruction recognition.
18 along with GCC; see the file COPYING.  If not, write to the Free
67 /* Nonzero means allow operands to be volatile.
70    This should be 1 if all valid insns need to be recognized,
89    Set to 1 or 0 by toplev.c.
177 /* Validate a proposed change to OBJECT.  LOC is the location in the rtl
190    If IN_GROUP is zero, this is a single change.  Try to recognize the insn
212 	   indexed addresses, or changes in up to 5 insns.  */
226       /* Set INSN_CODE to force rerecognition of insn.  Save old code in
244 /* This subroutine of apply_change_group verifies whether the changes to INSN
267   /* If we have to add CLOBBERs, fail if we have to add ones that reference
312   /* The changes have been applied and all INSN_CODEs have been reset to force
325       /* If there is no object to test or if it is the same as the one we
340 	     extra CLOBBERs at the end.  If so, try to re-recognize
342 	     them to be eliminated, in turn).  But don't do this if we
363 	      /* Add a new change to this group to replace the pattern
366 		 cause the entire call to fail if things remain invalid.
457 validate_replace_rtx_1 (rtx *loc, rtx from, rtx to, rtx object)
475   /* X matches FROM if it is the same rtx or they are both referring to the
486       validate_change (object, loc, to, 1);
490   /* Call ourself recursively to perform the replacements.
507 				      from, to, object);
510 	    validate_replace_rtx_1 (&XVECEXP (x, 0, j), from, to, object);
517 	  validate_replace_rtx_1 (&XEXP (x, i), from, to, object);
520 	    validate_replace_rtx_1 (&XVECEXP (x, i, j), from, to, object);
523   /* If we didn't substitute, there is nothing more to do.  */
527   /* Allow substituted expression to have different mode.  This is used by
528      regmove to change mode of pseudo register.  */
532   /* Do changes needed to keep rtx consistent.  Don't do any other
551          simplify_gen_binary to try to simplify it.
552          ??? We may want later to remove this, once simplification is
554       if (GET_CODE (XEXP (x, 1)) == CONST_INT && XEXP (x, 1) == to)
583       /* All subregs possible to simplify should be simplified.  */
595       /* If we are replacing a register with memory, try to change the memory
596          to be the mode required for memory in extract operations (this isn't
597          likely to be an insertion operation; if it was, nothing bad will
659 validate_replace_rtx (rtx from, rtx to, rtx insn)
661   validate_replace_rtx_1 (&PATTERN (insn), from, to, insn);
668 validate_replace_rtx_group (rtx from, rtx to, rtx insn)
670   validate_replace_rtx_1 (&PATTERN (insn), from, to, insn);
673 /* Function called by note_uses to replace used subexpressions.  */
677   rtx to;			/* New RTX */
687   validate_replace_rtx_1 (x, d->from, d->to, d->insn);
694 validate_replace_src_group (rtx from, rtx to, rtx insn)
699   d.to = to;
747    any ordered tests applied to the condition codes.
755   /* If there is no next insn, we have to take the conservative choice.  */
765 /* This is used by find_single_use to locate an rtx that contains exactly one
767    pointer to the innermost rtx expression containing DEST.  Appearances of
768    DEST that are being used to totally replace it are not counted.  */
865    sequel.  If so, return a pointer to the innermost rtx expression in which
868    If PLOC is nonzero, *PLOC is set to the insn containing the single use.
934    Register and memory references must have mode MODE in order to be valid,
984 	 reference to be explicit, so outlaw paradoxical SUBREGs.
1052    is to allow the representation of special architecture artifacts
1056    it is most consistent to keep this function from accepting them.  */
1069 	 because it is guaranteed to be reloaded into one.
1096      to be a register operand.  */
1223 	 because it is guaranteed to be reloaded into one.
1234      to be a register operand.  */
1381    MATCH_OPERATOR to recognize all the branch insns.  */
1418 	  /* Count backwards through CLOBBERs to determine number of SETs.  */
1669 	  /* ??? Before flow, auto inc/dec insns are not supposed to exist,
1794 		   /* Every memory operand can be reloaded to fit.  */
1798 		   /* Every address operand can be reloaded to fit.  */
1817    return the location (type rtx *) of the pointer to that constant term.
1915   /* Adjusting an offsettable address involves changing to a narrower mode.
1950      any instruction could need to add when operating on something
2115 /* After calling extract_insn, you can use this function to extract some
2256    WHICH_ALTERNATIVE is set to a number which indicates which
2260    In addition, when two operands are required to match
2272    before reload has completed.  In that case, we first try to see if we can
2275    guess" for the alternative and is used to compute attributes of insns prior
2276    to reload.  A negative value of STRICT is used for this internal call.  */
2415 		     to change the output to *--x as well, since the
2437 		/* No need to check general_operand again;
2465 		/* Memory operands must be valid, to the extent
2591 			   /* Every memory operand can be reloaded to fit.  */
2601 			   /* Every address operand can be reloaded to fit.  */
2617 	 Change whichever operands this alternative says to change.  */
2664   /* If we are about to reject this, but we are not to test strictly,
2672 /* Return 1 iff OPERAND (assumed to be a REG rtx)
2674    and changed to mode MODE.
2711   /* Split insns here to get max fine-grain parallelism.  */
2721   /* ??? Coddle to md files that generate subregs in post-reload
2773 		     is too risky to try to do this before register
2774 		     allocation, and there are unlikely to be very many
2779 			 to update liveness information.  */
2795 			 BB boundary we are interested in will be set to
2829 /* Same as split_all_insns, but do not expect CFG to be available.
2850 		 is too risky to try to do this before register
2851 		 allocation, and there are unlikely to be very many
2875 /* The number of instructions available to match a peep2.  */
2884    does not exist.  Used by the recognizer to find the next insn to match
2939 /* Try to find a hard register of mode MODE, matching the register class in
2951 peep2_find_free_register (int from, int to, const char *class_str,
2960   gcc_assert (to < MAX_INSNS_PER_PEEP2 + 1);
2965   to += peep2_current;
2966   if (to >= MAX_INSNS_PER_PEEP2 + 1)
2967     to -= MAX_INSNS_PER_PEEP2 + 1;
2972   while (from != to)
3062   /* Initialize the regsets we're going to use.  */
3253 		      /* Converting possibly trapping insn to non-trapping is
3262 		     So record that we've made a modification to this
3337   /* If we eliminated EH edges, we may be able to merge blocks.  Further,