config/mips/mips.c

101 /* Likewise for the last instruction in a delayed branch sequence.  */
183   /* The last type.  */
580 /* The operands passed to the last cmpMM expander.  */
3618   /* Calculate the value that SRC_REG should have after the last iteration
3684      indicated by the last argument being 'void_type_mode' if there
3849   /* We will be called with a mode of VOIDmode after the last argument
4008    first byte of the stack slot has useful data, false if the last
4019   /* Otherwise, integral types are padded downward: the last byte of a
4020      stack argument is passed in the last byte of the stack slot.  */
4068   /* The caller has advanced CUM up to, but not beyond, the last named
4069      argument.  Advance a local copy of CUM past the last "real" named
4477    the last byte if little endian.  This address can be used in the
4487   rtx first, last;
4518   last = adjust_address (*op, QImode, width / BITS_PER_UNIT - 1);
4523     *left = first, *right = last;
4525     *left = last, *right = first;
6203   /* Don't bother rechecking if we found one last time.  */
6779 /* Make the last instruction frame related and note that it performs
8466 /* Output constant VALUE after instruction INSN and return the last
8634   /* LAST_SET[X].INSN is the last instruction to set register X.
8880   rtx insn, subinsn, last, last2, next;
8885   /* LAST is the last instruction before INSN to have a nonzero length.
8886      LAST2 is the last such instruction before LAST.  */
8887   last = 0;
8948 		    emit_insn_after (gen_nop (), last);
8974 	  last2 = last;
8975 	  last = insn;
8993    number of instructions since the last hilo hazard (that is,
8994    the number of instructions since the last mflo or mfhi).
9036      Each new nop takes us further from the last hilo hazard.  */
9779 /* Used by TUNE_MACC_CHAINS to record the last scheduled instruction
9821 /* The last instruction to be scheduled.  */
9868      If INSN1 is the last instruction blocking X, it would better to