config/arm/arm.c

3126       if (GET_CODE (sym_ref) != MEM)
4326 	      + 4 * ((GET_CODE (SET_SRC (x)) == MEM)
4327 		     + GET_CODE (SET_DEST (x)) == MEM));
4370     case MEM:
4390 		  + (GET_CODE (XEXP (x, 0)) == MEM ? 10 : 0));
4394 		  + (GET_CODE (XEXP (x, 0)) == MEM ? 10 : 0));
4397 	  return (1 + (GET_CODE (XEXP (x, 0)) == MEM ? 10 : 0));
4419     case MEM:
4593 		+ (GET_CODE (XEXP (x, 0)) == MEM ? 10 : 0));
4600 		  + (GET_CODE (XEXP (x, 0)) == MEM ? 10 : 0));
4604 		  + (GET_CODE (XEXP (x, 0)) == MEM ? 10 : 0));
4607 	  return (1 + (GET_CODE (XEXP (x, 0)) == MEM ? 10 : 0));
4667     case MEM:
5141    PRE/POST_INC/DEC, SHIFT or NON-INT sum, INT sum, REG, MEM or LABEL.  */
5149   if (c == MEM || c == LABEL_REF || c == SYMBOL_REF)
5245       && GET_CODE (SET_SRC (i_pat)) == MEM
5247       && GET_CODE (SET_DEST (d_pat)) == MEM)
5354   if (GET_CODE (op) == MEM)
5396   if (GET_CODE (op) != MEM)
5507   return (GET_CODE (rhs) == MEM
5750       if (GET_CODE (rhs) == MEM
5871       gcc_assert (GET_CODE (operands[nops + i]) == MEM);
6098       gcc_assert (GET_CODE (operands[nops + i]) == MEM);
6753       && GET_CODE (SUBREG_REG (XEXP (x, 0))) == MEM
8185 	  else if (GET_CODE (op) == MEM
8754    It must be REG<-REG, REG<-CONST_DOUBLE, REG<-CONST_INT, REG<-MEM
8755    or MEM<-REG and all MEMs must be offsettable addresses.  */
8769       gcc_assert (code1 == MEM);  /* Constraints should ensure this.  */
8937       gcc_assert (code0 == MEM && code1 == REG);
11349 	case MEM:
13959       gcc_assert (GET_CODE (DECL_RTL (current_function_decl)) == MEM);
14199   gcc_assert (GET_CODE (operands[1]) == MEM);
15014   if (GET_CODE (operands [1]) != MEM
15503 	  || GET_CODE (XEXP (e, 0)) != MEM
15553     case MEM: