Lines Matching refs:uint16_t
74 uint16_t handle;
79 uint16_t *n, uint16_t *size);
101 uint16_t maxssize; /* maximum size in bytes of a struct */
106 uint16_t stlen; /* len in bytes of structure table */
108 uint16_t stnum; /* number of structure table entries */
131 uint16_t segment; /* address segment location */
209 uint16_t clkspeed; /* ext clock speed in mhz */
210 uint16_t maxspeed; /* maximum speed in mhz */
211 uint16_t curspeed; /* current speed in mhz */
214 uint16_t l1handle; /* l1 cache handle */
215 uint16_t l2handle; /* l2 cache handle */
216 uint16_t l3handle; /* l3 cache handle */
223 uint16_t cflags; /* processor characteristics */
224 uint16_t family2; /* processor family 2 */
242 uint16_t errhand; /* handle of error (if any) */
243 uint16_t ndevs; /* num of slots or sockets */
258 uint16_t arrayhand; /* handle of physl mem array */
259 uint16_t errhand; /* handle of mem error data */
260 uint16_t twidth; /* total width in bits */
261 uint16_t dwidth; /* data width in bits */
262 uint16_t size; /* size in kb or mb */
268 uint16_t flags; /* memory characteristics */
269 uint16_t maxspeed; /* maximum speed in mhz */
276 uint16_t curspeed; /* current speed in mhz */
277 uint16_t minvoltage; /* minimum voltage */
278 uint16_t maxvoltage; /* maximum voltage */
279 uint16_t curvoltage; /* configured voltage */
289 uint16_t arrayhand; /* physical mem array handle */
350 uint16_t *n, uint16_t *size);
428 uint16_t *n, uint16_t *size);
443 uint16_t *n, uint16_t *size);
483 uint16_t *n, uint16_t *size);
497 uint16_t *n, uint16_t *size);
511 uint16_t *n, uint16_t *size);
545 static uint16_t type16_handle;
550 uint16_t *n, uint16_t *size)
588 uint16_t *n, uint16_t *size)
640 uint16_t *n, uint16_t *size)
682 uint16_t *n, uint16_t *size)
699 uint16_t *n, uint16_t *size)
743 uint16_t *n, uint16_t *size)
785 smbios_ep_finalizer(struct smbios_entry_point *smbios_ep, uint16_t len,
786 uint16_t num, uint16_t maxssize)
812 uint16_t n;
813 uint16_t maxssize;
842 uint16_t size;