Lines Matching refs:ATH_READ_REG
85 memcfg = ATH_READ_REG(AR5315_SDRAMCTL_BASE + AR5315_SDRAMCTL_MEM_CFG);
121 const uint32_t pllc = ATH_READ_REG(AR5315_SYSREG_BASE +
145 const uint32_t amba_clkctl = ATH_READ_REG(AR5315_SYSREG_BASE +
151 const uint32_t cpu_clkctl = ATH_READ_REG(AR5315_SYSREG_BASE +
175 ATH_READ_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_AHB_ERR1);
182 ATH_READ_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_AHB_ARB_CTL) |
188 ATH_READ_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_ENDIAN) |
195 ATH_READ_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_AHB_ARB_CTL));
197 ATH_READ_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_ENDIAN));
205 reg = ATH_READ_REG(AR5315_SYSREG_BASE + AR5315_SYSREG_COLDRESET);