Lines Matching refs:x7
442 #define MCDI_EVENT_LINKCHANGE_SPEED_100G 0x7
510 #define MCDI_EVENT_AOE_LOAD 0x7
565 #define MCDI_EVENT_AOE_ERR_FPGA_HEADER_DDR_SIZE 0x7
639 #define MCDI_EVENT_CODE_REBOOT 0x7
861 #define FCDI_EVENT_CODE_PTP_TICK 0x7
1029 #define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_LOOPBACK_PASSIVE 0x7 /* enum */
1250 #define MC_CMD_LOG_CTRL 0x7
1369 #define MC_CMD_PTP_OP_SYNCHRONIZE 0x7
2022 #define MC_CMD_PTP_MANF_FILTER_COUNT 0x7
2764 #define MC_CMD_FW_L3XUDP 0x7
3089 #define MC_CMD_MEDIA_QSFP_PLUS 0x7
3100 #define MC_CMD_MMD_CLAUSE45_AN 0x7 /* enum */
3136 #define MC_CMD_PORT_MEM_BIST 0x7
3244 #define MC_CMD_POLL_BIST_MRSFP_TEST_MODULE_ID_I2C_ACCESS 0x7
3292 #define MC_CMD_POLL_BIST_MEM_BUS_DPCPU_RX1 0x7
3368 #define MC_CMD_LOOPBACK_SGMII 0x7
3484 /* MC_CMD_LOOPBACK_SGMII 0x7 */
4004 #define MC_CMD_PMA_PMD_SNR_C 0x7
4106 #define MC_CMD_MAC_TX_BYTES 0x7 /* enum */
4503 #define MC_CMD_WOL_TYPE_MAX 0x7
4670 #define MC_CMD_NVRAM_TYPE_EXP_ROM 0x7
5026 #define MC_CMD_NVRAM_VERIFY_RC_NO_VALID_SIGNATURES 0x7
5200 #define MC_CMD_SENSOR_IN_1V0 0x7
5698 #define MC_CMD_WORKAROUND_BUG61265 0x7
6092 #define MC_CMD_MUM_OP_GPIO 0x7
9647 #define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXHRSL_HR_LUT_CFG 0x7
9874 #define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_LAYER2_PERF 0x7
9917 #define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_TYPE_LAYER2_PERF 0x7
10088 #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_TYPE_LAYER2_PERF 0x7
10131 #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXPD_FW_TYPE_LAYER2_PERF 0x7
10411 #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_TYPE_LAYER2_PERF 0x7
10454 #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXPD_FW_TYPE_LAYER2_PERF 0x7
10759 #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_TYPE_LAYER2_PERF 0x7
10802 #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXPD_FW_TYPE_LAYER2_PERF 0x7
11115 #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_TYPE_LAYER2_PERF 0x7
11158 #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXPD_FW_TYPE_LAYER2_PERF 0x7
12711 #define MC_CMD_DPCPU_RPC_IN_CMDNUM_TXDPCPU_WRITE 0x7 /* enum */
13201 #define MC_CMD_KR_TUNE_IN_READ_FOM 0x7
13263 #define MC_CMD_KR_TUNE_RXEQ_GET_OUT_EDFE_DLEV 0x7
13410 #define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TX_PREDRV_DLY 0x7
13658 #define MC_CMD_PCIE_TUNE_IN_BIST_SQUARE_WAVE 0x7
13706 #define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_DFE_DLEV 0x7
13722 #define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_7 0x7 /* enum */
15772 #define MC_CMD_TSA_BIND_OP_DECOMMISSION 0x7
17586 #define MC_CMD_SUC_MANFTEST_FRU_WRITE 0x7