Lines Matching refs:mem_res
92 struct resource *mem_res; /* Memory resource */
108 return (bus_read_1(sc->mem_res, off));
117 bus_write_1(sc->mem_res, off, val);
126 return (bus_read_2(sc->mem_res, off));
135 bus_write_2(sc->mem_res, off, val);
145 val32 = bus_read_4(sc->mem_res, off);
158 bus_write_4(sc->mem_res, off, val);
167 bus_read_multi_4(sc->mem_res, off, data, count);
176 bus_write_multi_4(sc->mem_res, off, data, count);
211 reg = bus_read_4(sc->mem_res, XENON_EMMC_PHY_TIMING_ADJUST);
226 bus_write_4(sc->mem_res, XENON_EMMC_PHY_TIMING_ADJUST, reg);
228 reg = bus_read_4(sc->mem_res, XENON_EMMC_PHY_TIMING_ADJUST);
230 bus_write_4(sc->mem_res, XENON_EMMC_PHY_TIMING_ADJUST, reg);
236 reg = bus_read_4(sc->mem_res, XENON_EMMC_PHY_TIMING_ADJUST);
257 reg = bus_read_4(sc->mem_res, XENON_EMMC_PHY_PAD_CONTROL);
262 bus_write_4(sc->mem_res, XENON_EMMC_PHY_PAD_CONTROL, reg);
265 reg = bus_read_4(sc->mem_res, XENON_EMMC_PHY_PAD_CONTROL1);
268 bus_write_4(sc->mem_res, XENON_EMMC_PHY_PAD_CONTROL1, reg);
274 reg = bus_read_4(sc->mem_res, XENON_EMMC_PHY_TIMING_ADJUST);
276 bus_write_4(sc->mem_res, XENON_EMMC_PHY_TIMING_ADJUST, reg);
283 reg = bus_read_4(sc->mem_res, XENON_EMMC_PHY_PAD_CONTROL2);
286 bus_write_4(sc->mem_res, XENON_EMMC_PHY_PAD_CONTROL2, reg);
289 reg = bus_read_4(sc->mem_res, SDHCI_CLOCK_CONTROL);
291 bus_write_4(sc->mem_res, SDHCI_CLOCK_CONTROL, reg);
293 reg = bus_read_4(sc->mem_res, XENON_EMMC_PHY_FUNC_CONTROL);
310 bus_write_4(sc->mem_res, XENON_EMMC_PHY_FUNC_CONTROL, reg);
313 reg = bus_read_4(sc->mem_res, SDHCI_CLOCK_CONTROL);
315 bus_write_4(sc->mem_res, SDHCI_CLOCK_CONTROL, reg);
318 bus_write_4(sc->mem_res, XENON_EMMC_PHY_LOGIC_TIMING_ADJUST,
322 reg = bus_read_4(sc->mem_res, XENON_SLOT_EMMC_CTRL);
324 bus_write_4(sc->mem_res, XENON_SLOT_EMMC_CTRL, reg);
327 reg = bus_read_4(sc->mem_res, XENON_EMMC_PHY_PAD_CONTROL1);
329 bus_write_4(sc->mem_res, XENON_EMMC_PHY_PAD_CONTROL1, reg);
377 reg = bus_read_4(sc->mem_res, XENON_SYS_OP_CTRL);
379 bus_write_4(sc->mem_res, XENON_SYS_OP_CTRL, reg);
489 sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
491 if (sc->mem_res == NULL) {
530 reg = bus_read_4(sc->mem_res, XENON_SYS_OP_CTRL);
532 bus_write_4(sc->mem_res, XENON_SYS_OP_CTRL, reg);
536 bus_write_4(sc->mem_res, XENON_SYS_OP_CTRL, reg);
539 reg = bus_read_4(sc->mem_res, XENON_SYS_EXT_OP_CTRL);
541 bus_write_4(sc->mem_res, XENON_SYS_EXT_OP_CTRL, reg);
545 bus_write_4(sc->mem_res, XENON_SYS_OP_CTRL, reg);
548 reg = bus_read_4(sc->mem_res, XENON_SYS_OP_CTRL);
550 bus_write_4(sc->mem_res, XENON_SYS_OP_CTRL, reg);
553 reg = bus_read_4(sc->mem_res, XENON_SYS_EXT_OP_CTRL);
555 bus_write_4(sc->mem_res, XENON_SYS_EXT_OP_CTRL, reg);
565 bus_release_resource(dev, SYS_RES_MEMORY, rman_get_rid(sc->mem_res),
566 sc->mem_res);
586 bus_release_resource(dev, SYS_RES_MEMORY, rman_get_rid(sc->mem_res),
587 sc->mem_res);