Lines Matching refs:vals
137 uint16_t rx[2][2], struct r92ce_iq_cal_reg_vals *vals)
151 vals->adda[i] = rtwn_bb_read(sc, reg_adda[i]);
153 vals->txpause = rtwn_read_1(sc, R92C_TXPAUSE);
154 vals->bcn_ctrl[0] = rtwn_read_1(sc, R92C_BCN_CTRL(0));
155 vals->bcn_ctrl[1] = rtwn_read_1(sc, R92C_BCN_CTRL(1));
156 vals->gpio_muxcfg = rtwn_read_4(sc, R92C_GPIO_MUXCFG);
177 vals->ofdm0_trxpathena =
179 vals->ofdm0_trmuxpar = rtwn_bb_read(sc, R92C_OFDM0_TRMUXPAR);
180 vals->fpga0_rfifacesw1 =
195 vals->bcn_ctrl[0] & ~R92C_BCN_CTRL_EN_BCN);
197 vals->bcn_ctrl[1] & ~R92C_BCN_CTRL_EN_BCN);
199 vals->gpio_muxcfg & ~R92C_GPIO_MUXCFG_ENBT);
257 vals->ofdm0_trxpathena);
259 vals->fpga0_rfifacesw1);
260 rtwn_bb_write(sc, R92C_OFDM0_TRMUXPAR, vals->ofdm0_trmuxpar);
274 rtwn_bb_write(sc, reg_adda[i], vals->adda[i]);
276 rtwn_write_1(sc, R92C_TXPAUSE, vals->txpause);
277 rtwn_write_1(sc, R92C_BCN_CTRL(0), vals->bcn_ctrl[0]);
278 rtwn_write_1(sc, R92C_BCN_CTRL(1), vals->bcn_ctrl[1]);
279 rtwn_write_4(sc, R92C_GPIO_MUXCFG, vals->gpio_muxcfg);
364 struct r92ce_iq_cal_reg_vals vals;
370 r92ce_iq_calib_run(sc, n, tx[n], rx[n], &vals);