Lines Matching refs:PHY_PCIE_IP_REG_AHB_LANE_CSR_1_X122_AHB_TX_CXN_OVR_K2_E5
30640 #define PHY_PCIE_IP_REG_AHB_LANE_CSR_1_X122_AHB_TX_CXN_OVR_K2_E5 (0xf<<4) // override calibrated txterm value