Lines Matching refs:MISC_REG_AEU_ENABLE8_SYS_KILL
36518 #define MISC_REG_AEU_ENABLE8_SYS_KILL 0x008620UL //Access:RW DataWidth:0x20 // Eighth 32b for enabling the output for system kill. Mapped as follows: [0] PSWRQ (pci_clk) Parity error; [1] PSWRQ (pci_clk) Hw interrupt; [2] PSWWR Parity error; [3] PSWWR Hw interrupt; [4] PSWWR (pci_clk) Parity error; [5] PSWWR (pci_clk) Hw interrupt; [6] PSWRD Parity error; [7] PSWRD Hw interrupt; [8] PSWRD (pci_clk) Parity error; [9] PSWRD (pci_clk) Hw interrupt; [10] PSWHST Parity error; [11] PSWHST Hw interrupt; [12] PSWHST (pci_clk) Parity error; [13] PSWHST (pci_clk) Hw interrupt; [14] GRC Parity error; [15] GRC Hw interrupt; [16] CPMU Parity error; [17] CPMU Hw interrupt; [18] NCSI Parity error; [19] NCSI Hw interrupt; [20] YSEM PRAM Parity error; [21] XSEM PRAM Parity error; [22] USEM PRAM Parity error; [23] TSEM PRAM Parity error; [24] PSEM PRAM Parity error; [25] MSEM PRAM Parity error; [26] pxp_misc_mps_attn; [27] PCIE glue/PXP Expansion ROM event; [28] PERST_B assertion; [29] PERST_B de-assertion; [30] WOL Parity error; [31] WOL Hw interrupt;