Lines Matching defs:MSEM_REG_DBG_DWORD_ENABLE
90523 #define MSEM_REG_DBG_DWORD_ENABLE 0x180152cUL //Access:RW DataWidth:0x4 // DBMUX register. Bit mask for enabling dword (128bit line) / qword (256bit line) in the selected line (before shift).for selecting a line to output