Lines Matching defs:loResource
3870 tiLoLevelResource_t *loResource;
3943 loResource = &(tdsaAllShared->loResource);
3973 tdsaAllShared->SwConfig.max_MSIX_InterruptVectors = loResource->loLevelOption.maxInterruptVectors;
3974 tdsaAllShared->SwConfig.max_MSI_InterruptVectors = loResource->loLevelOption.max_MSI_InterruptVectors;
3975 tdsaAllShared->SwConfig.legacyInt_X = loResource->loLevelOption.flag;
4084 TI_DBG1(("tiCOMPortInit: loResource->loLevelMem.count %d\n", loResource->loLevelMem.count));
4099 TI_DBG1(("tiCOMPortInit: loResource->loLevelMem.count %d\n", loResource->loLevelMem.count));
4102 SMMemCount = loResource->loLevelMem.count - LLMemCount - DMMemCount;
4122 TI_DBG1(("tiCOMPortInit: loResource->loLevelMem.count %d\n", loResource->loLevelMem.count));
4125 DMMemCount = loResource->loLevelMem.count - LLMemCount;
4140 TI_DBG1(("tiCOMPortInit: loResource->loLevelMem.count %d\n", loResource->loLevelMem.count));
4143 SMMemCount = loResource->loLevelMem.count - LLMemCount;
4149 agMemoryRequirement.count = loResource->loLevelMem.count;
4157 TI_DBG2(("tiCOMPortInit: index %d phyAddrUpper 0x%x phyAddrLower 0x%x totalLength %d alignment %d\n", i, loResource->loLevelMem.mem[i].physAddrUpper, loResource->loLevelMem.mem[i].physAddrLower, loResource->loLevelMem.mem[i].totalLength, loResource->loLevelMem.mem[i].alignment));
4158 TI_DBG2(("tiCOMPortInit: index %d virtPtr %p\n",i, loResource->loLevelMem.mem[i].virtPtr));
4180 TI_DBG2(("tiCOMPortInit: LL copying loResource.loLevelMem to agsaMemoryRequirement_t index %d\n", i));
4181 agMemoryRequirement.agMemory[i].virtPtr = loResource->loLevelMem.mem[i].virtPtr;
4182 agMemoryRequirement.agMemory[i].osHandle = loResource->loLevelMem.mem[i].osHandle;
4183 agMemoryRequirement.agMemory[i].phyAddrUpper = loResource->loLevelMem.mem[i].physAddrUpper;
4184 agMemoryRequirement.agMemory[i].phyAddrLower = loResource->loLevelMem.mem[i].physAddrLower;
4185 agMemoryRequirement.agMemory[i].totalLength = loResource->loLevelMem.mem[i].totalLength;
4186 agMemoryRequirement.agMemory[i].numElements = loResource->loLevelMem.mem[i].numElements;
4187 agMemoryRequirement.agMemory[i].singleElementLength = loResource->loLevelMem.mem[i].singleElementLength;
4188 agMemoryRequirement.agMemory[i].alignment = loResource->loLevelMem.mem[i].alignment;
4189 if (loResource->loLevelMem.mem[i].type == TI_DMA_MEM)
4193 else if (loResource->loLevelMem.mem[i].type == TI_CACHED_MEM)
4198 else if (loResource->loLevelMem.mem[i].type == TI_CACHED_DMA_MEM)
4203 agMemoryRequirement.agMemory[i].reserved = loResource->loLevelMem.mem[i].reserved;
4204 TI_DBG2(("tiCOMPortInit: index %d virtPtr %p osHandle %p\n",i, loResource->loLevelMem.mem[i].virtPtr, loResource->loLevelMem.mem[i].osHandle));
4206 loResource->loLevelMem.mem[i].physAddrUpper,
4207 loResource->loLevelMem.mem[i].physAddrLower,
4208 loResource->loLevelMem.mem[i].totalLength,
4209 loResource->loLevelMem.mem[i].numElements));
4211 loResource->loLevelMem.mem[i].singleElementLength,
4212 loResource->loLevelMem.mem[i].alignment,
4213 loResource->loLevelMem.mem[i].type,
4214 loResource->loLevelMem.mem[i].reserved));
4300 tdsaAllShared->SwConfig.fatalErrorInterruptVector = loResource->loLevelOption.maxInterruptVectors > 31 ? 31 : loResource->loLevelOption.maxInterruptVectors -1;
4304 TI_DBG1(("tiCOMPortInit: loResource->loLevelOption.usecsPerTick %d\n", loResource->loLevelOption.usecsPerTick));
4311 loResource->loLevelOption.usecsPerTick);
4313 TI_DBG6(("tiCOMPortInit: loResource->loLevelOption.usecsPerTick %d 0x%x\n", loResource->loLevelOption.usecsPerTick, loResource->loLevelOption.usecsPerTick));
4406 TI_DBG2(("tiCOMPortInit: DM copying loResource.loLevelMem to agsaMemoryRequirement_t index %d\n", i));
4407 dmMemRequirement.dmMemory[i-LLMemCount].virtPtr = loResource->loLevelMem.mem[i].virtPtr;
4408 dmMemRequirement.dmMemory[i-LLMemCount].osHandle = loResource->loLevelMem.mem[i].osHandle;
4409 dmMemRequirement.dmMemory[i-LLMemCount].physAddrUpper = loResource->loLevelMem.mem[i].physAddrUpper;
4410 dmMemRequirement.dmMemory[i-LLMemCount].physAddrLower = loResource->loLevelMem.mem[i].physAddrLower;
4411 dmMemRequirement.dmMemory[i-LLMemCount].totalLength = loResource->loLevelMem.mem[i].totalLength;
4412 dmMemRequirement.dmMemory[i-LLMemCount].numElements = loResource->loLevelMem.mem[i].numElements;
4413 dmMemRequirement.dmMemory[i-LLMemCount].singleElementLength = loResource->loLevelMem.mem[i].singleElementLength;
4414 dmMemRequirement.dmMemory[i-LLMemCount].alignment = loResource->loLevelMem.mem[i].alignment;
4415 dmMemRequirement.dmMemory[i-LLMemCount].type = loResource->loLevelMem.mem[i].type;
4416 dmMemRequirement.dmMemory[i-LLMemCount].reserved = loResource->loLevelMem.mem[i].reserved;
4417 TI_DBG2(("tiCOMPortInit: index %d virtPtr %p osHandle %p\n",i, loResource->loLevelMem.mem[i].virtPtr, loResource->loLevelMem.mem[i].osHandle));
4419 loResource->loLevelMem.mem[i].physAddrUpper,
4420 loResource->loLevelMem.mem[i].physAddrLower,
4421 loResource->loLevelMem.mem[i].totalLength,
4422 loResource->loLevelMem.mem[i].numElements));
4424 loResource->loLevelMem.mem[i].singleElementLength,
4425 loResource->loLevelMem.mem[i].alignment,
4426 loResource->loLevelMem.mem[i].type,
4427 loResource->loLevelMem.mem[i].reserved));
4435 loResource->loLevelOption.usecsPerTick);
4451 TI_DBG1(("tiCOMPortInit: SM copying loResource.loLevelMem to agsaMemoryRequirement_t index %d\n", i));
4452 smMemRequirement.smMemory[i-LLMemCount-DMMemCount].virtPtr = loResource->loLevelMem.mem[i].virtPtr;
4453 smMemRequirement.smMemory[i-LLMemCount-DMMemCount].osHandle = loResource->loLevelMem.mem[i].osHandle;
4454 smMemRequirement.smMemory[i-LLMemCount-DMMemCount].physAddrUpper = loResource->loLevelMem.mem[i].physAddrUpper;
4455 smMemRequirement.smMemory[i-LLMemCount-DMMemCount].physAddrLower = loResource->loLevelMem.mem[i].physAddrLower;
4456 smMemRequirement.smMemory[i-LLMemCount-DMMemCount].totalLength = loResource->loLevelMem.mem[i].totalLength;
4457 smMemRequirement.smMemory[i-LLMemCount-DMMemCount].numElements = loResource->loLevelMem.mem[i].numElements;
4458 smMemRequirement.smMemory[i-LLMemCount-DMMemCount].singleElementLength = loResource->loLevelMem.mem[i].singleElementLength;
4459 smMemRequirement.smMemory[i-LLMemCount-DMMemCount].alignment = loResource->loLevelMem.mem[i].alignment;
4460 smMemRequirement.smMemory[i-LLMemCount-DMMemCount].type = loResource->loLevelMem.mem[i].type;
4461 smMemRequirement.smMemory[i-LLMemCount-DMMemCount].reserved = loResource->loLevelMem.mem[i].reserved;
4462 TI_DBG2(("tiCOMPortInit: index %d virtPtr %p osHandle %p\n",i, loResource->loLevelMem.mem[i].virtPtr, loResource->loLevelMem.mem[i].osHandle));
4464 loResource->loLevelMem.mem[i].physAddrUpper,
4465 loResource->loLevelMem.mem[i].physAddrLower,
4466 loResource->loLevelMem.mem[i].totalLength,
4467 loResource->loLevelMem.mem[i].numElements));
4469 loResource->loLevelMem.mem[i].singleElementLength,
4470 loResource->loLevelMem.mem[i].alignment,
4471 loResource->loLevelMem.mem[i].type,
4472 loResource->loLevelMem.mem[i].reserved));
4480 loResource->loLevelOption.usecsPerTick);
4496 TI_DBG6(("tiCOMPortInit: copying loResource.loLevelMem to agsaMemoryRequirement_t index %d\n", i));
4497 dmMemRequirement.dmMemory[i-LLMemCount].virtPtr = loResource->loLevelMem.mem[i].virtPtr;
4498 dmMemRequirement.dmMemory[i-LLMemCount].osHandle = loResource->loLevelMem.mem[i].osHandle;
4499 dmMemRequirement.dmMemory[i-LLMemCount].physAddrUpper = loResource->loLevelMem.mem[i].physAddrUpper;
4500 dmMemRequirement.dmMemory[i-LLMemCount].physAddrLower = loResource->loLevelMem.mem[i].physAddrLower;
4501 dmMemRequirement.dmMemory[i-LLMemCount].totalLength = loResource->loLevelMem.mem[i].totalLength;
4502 dmMemRequirement.dmMemory[i-LLMemCount].numElements = loResource->loLevelMem.mem[i].numElements;
4503 dmMemRequirement.dmMemory[i-LLMemCount].singleElementLength = loResource->loLevelMem.mem[i].singleElementLength;
4504 dmMemRequirement.dmMemory[i-LLMemCount].alignment = loResource->loLevelMem.mem[i].alignment;
4505 dmMemRequirement.dmMemory[i-LLMemCount].type = loResource->loLevelMem.mem[i].type;
4506 dmMemRequirement.dmMemory[i-LLMemCount].reserved = loResource->loLevelMem.mem[i].reserved;
4507 TI_DBG6(("tiCOMPortInit: index %d phyAddrUpper 0x%x phyAddrLower 0x%x totalLength %d alignment %d\n", i, loResource->loLevelMem.mem[i].physAddrUpper, loResource->loLevelMem.mem[i].physAddrLower, loResource->loLevelMem.mem[i].totalLength, loResource->loLevelMem.mem[i].alignment));
4508 TI_DBG6(("tiCOMPortInit: index %d virtPtr %p\n",i, loResource->loLevelMem.mem[i].virtPtr));
4516 loResource->loLevelOption.usecsPerTick);
4532 TI_DBG6(("tiCOMPortInit: copying loResource.loLevelMem to agsaMemoryRequirement_t index %d\n", i));
4533 smMemRequirement.smMemory[i-LLMemCount].virtPtr = loResource->loLevelMem.mem[i].virtPtr;
4534 smMemRequirement.smMemory[i-LLMemCount].osHandle = loResource->loLevelMem.mem[i].osHandle;
4535 smMemRequirement.smMemory[i-LLMemCount].physAddrUpper = loResource->loLevelMem.mem[i].physAddrUpper;
4536 smMemRequirement.smMemory[i-LLMemCount].physAddrLower = loResource->loLevelMem.mem[i].physAddrLower;
4537 smMemRequirement.smMemory[i-LLMemCount].totalLength = loResource->loLevelMem.mem[i].totalLength;
4538 smMemRequirement.smMemory[i-LLMemCount].numElements = loResource->loLevelMem.mem[i].numElements;
4539 smMemRequirement.smMemory[i-LLMemCount].singleElementLength = loResource->loLevelMem.mem[i].singleElementLength;
4540 smMemRequirement.smMemory[i-LLMemCount].alignment = loResource->loLevelMem.mem[i].alignment;
4541 smMemRequirement.smMemory[i-LLMemCount].type = loResource->loLevelMem.mem[i].type;
4542 smMemRequirement.smMemory[i-LLMemCount].reserved = loResource->loLevelMem.mem[i].reserved;
4543 TI_DBG6(("tiCOMPortInit: index %d phyAddrUpper 0x%x phyAddrLower 0x%x totalLength %d alignment %d\n", i, loResource->loLevelMem.mem[i].physAddrUpper, loResource->loLevelMem.mem[i].physAddrLower, loResource->loLevelMem.mem[i].totalLength, loResource->loLevelMem.mem[i].alignment));
4544 TI_DBG6(("tiCOMPortInit: index %d virtPtr %p\n",i, loResource->loLevelMem.mem[i].virtPtr));
4552 loResource->loLevelOption.usecsPerTick);