Lines Matching refs:bar_info
350 struct amd_ntb_pci_bar_info *bar_info;
355 bar_info = &ntb->bar_info[ntb->hw_info->bar_start_idx + mw_idx];
358 *base = bar_info->pbase;
361 *vbase = bar_info->vbase;
364 *align = bar_info->size;
367 *size = bar_info->size;
391 struct amd_ntb_pci_bar_info *bar_info;
396 bar_info = &ntb->bar_info[ntb->hw_info->bar_start_idx + mw_idx];
399 if (size > bar_info->size) {
401 __func__, (uintmax_t)size, (uintmax_t)bar_info->size);
406 __func__, mw_idx, (uintmax_t)bar_info->size,
407 (uintmax_t)size, (void *)bar_info->pci_bus_handle);
415 amd_ntb_peer_reg_write(8, bar_info->xlat_off, (uint64_t)addr);
417 __func__, mw_idx, bar_info->xlat_off,
418 amd_ntb_peer_reg_read(8, bar_info->xlat_off), (void *)addr);
428 amd_ntb_reg_write(4, bar_info->limit_off, (uint32_t)size);
430 __func__, bar_info->limit_off,
431 amd_ntb_peer_reg_read(4, bar_info->limit_off),
434 amd_ntb_reg_write(8, bar_info->limit_off, (uint64_t)size);
436 __func__, bar_info->limit_off,
437 amd_ntb_peer_reg_read(8, bar_info->limit_off),
461 struct amd_ntb_pci_bar_info *bar_info;
467 bar_info = &ntb->bar_info[ntb->hw_info->bar_start_idx + mw_idx];
468 if (mode == bar_info->map_mode)
471 rc = pmap_change_attr((vm_offset_t)bar_info->vbase, bar_info->size, mode);
473 bar_info->map_mode = mode;
482 struct amd_ntb_pci_bar_info *bar_info;
489 bar_info = &ntb->bar_info[ntb->hw_info->bar_start_idx + mw_idx];
490 *mode = bar_info->map_mode;
1152 ntb->bar_info[NTB_CONFIG_BAR].pci_resource_id = PCIR_BAR(0);
1153 rc = map_bar(ntb, &ntb->bar_info[NTB_CONFIG_BAR]);
1158 ntb->bar_info[NTB_BAR_1].pci_resource_id = PCIR_BAR(1);
1159 rc = map_bar(ntb, &ntb->bar_info[NTB_BAR_1]);
1162 ntb->bar_info[NTB_BAR_1].xlat_off = AMD_BAR1XLAT_OFFSET;
1163 ntb->bar_info[NTB_BAR_1].limit_off = AMD_BAR1LMT_OFFSET;
1166 ntb->bar_info[NTB_BAR_2].pci_resource_id = PCIR_BAR(2);
1167 rc = map_bar(ntb, &ntb->bar_info[NTB_BAR_2]);
1170 ntb->bar_info[NTB_BAR_2].xlat_off = AMD_BAR23XLAT_OFFSET;
1171 ntb->bar_info[NTB_BAR_2].limit_off = AMD_BAR23LMT_OFFSET;
1174 ntb->bar_info[NTB_BAR_3].pci_resource_id = PCIR_BAR(4);
1175 rc = map_bar(ntb, &ntb->bar_info[NTB_BAR_3]);
1178 ntb->bar_info[NTB_BAR_3].xlat_off = AMD_BAR45XLAT_OFFSET;
1179 ntb->bar_info[NTB_BAR_3].limit_off = AMD_BAR45LMT_OFFSET;
1191 struct amd_ntb_pci_bar_info *bar_info;
1195 bar_info = &ntb->bar_info[i];
1196 if (bar_info->pci_resource != NULL)
1198 bar_info->pci_resource_id, bar_info->pci_resource);