Lines Matching defs:BIT_14
178 #define BIT_14 (1 << 14)
281 #define PCI_FORCE_BE BIT_14 /* Assert all BEs on MR */
334 #define PCI_ASPM_GPHY_LINK_DOWN BIT_14 /* GPHY Link Down (A1 only) */
420 #define PEX_COMP_TO BIT_14 /* Completion Timeout */
790 #define Y2_HW_WOL_OFF BIT_14 /* HW WOL Off (Yukon-EC Ultra A1 only) */
1002 #define GLB_GPIO_LED_PAD_SPEED_UP BIT_14 /* LED PAD Speed Up */
1101 #define BMU_DIS_RX_RSS_HASH BIT_14 /* Disable Rx RSS Hash */
1224 #define WOL_CTL_MAGIC_PKT_OCC BIT_14
1346 #define PHY_M_AN_ACK BIT_14 /* (ro) Acknowledge Received */
1412 #define PHY_M_PC_ENA_ENE_DT BIT_14 /* Enable Energy Detect (sense & pulse) */
1424 #define PHY_M_PS_SPEED_100 BIT_14 /* 01 = 100 Mbps */
1443 #define PHY_M_PS_RES_SPEED BIT_14 /* Resolved Speed (1=100 Mbps, 0=10 Mbps */
1448 #define PHY_M_IS_LSP_CHANGE BIT_14 /* Link Speed Changed */
1468 #define PHY_M_EC_ENA_LIN_LB BIT_14 /* Enable Line Loopback (88E1111 only) */
1558 #define PHY_M_FC_AN_REG_ACC BIT_14 /* Fiber/Copper AN Reg. Access */
1813 #define GM_GPSR_DUPLEX BIT_14 /* Duplex Mode (1 = Full) */
1827 #define GM_GPCR_RMII_LB_ENA BIT_14 /* Enable RMII Loopback (Yukon-FE only) */
1848 #define GM_TXCR_CRC_DIS BIT_14 /* Disable insertion of CRC */
1859 #define GM_RXCR_MCF_ENA BIT_14 /* Enable Multicast filtering */
1968 #define GMF_WP_TST_ON BIT_14 /* Write Pointer Test On */
2065 #define GMC_SEC_RST_OFF BIT_14 /* MAC SEC RST Off */
2096 #define GPC_ANEG_1 BIT_14 /* ANEG[1] */