Lines Matching refs:targ

287 		struct mprsas_target *targ;
407 targ = &sassc->targets[id];
408 targ->handle = 0x0;
409 targ->encl_slot = 0x0;
410 targ->encl_handle = 0x0;
411 targ->encl_level_valid = 0x0;
412 targ->encl_level = 0x0;
413 targ->connector_name[0] = ' ';
414 targ->connector_name[1] = ' ';
415 targ->connector_name[2] = ' ';
416 targ->connector_name[3] = ' ';
417 targ->exp_dev_handle = 0x0;
418 targ->phy_num = 0x0;
419 targ->linkrate = 0x0;
420 mprsas_rescan_target(sc, targ);
422 targ->tid);
431 targ = mprsas_find_target_by_handle(sassc, 0,
433 if (targ == NULL)
435 targ->flags |= MPR_TARGET_FLAGS_RAID_COMPONENT;
436 mprsas_rescan_target(sc, targ);
494 struct mprsas_target *targ;
506 targ =
509 if (targ) {
538 struct mprsas_target *targ;
583 targ = mprsas_find_target_by_handle(
586 if (targ) {
587 targ->flags |=
600 targ = mprsas_find_target_by_handle(
603 if (targ) {
604 targ->flags |=
826 struct mprsas_target *targ;
930 targ = &sassc->targets[id];
931 if (!(targ->flags & MPR_TARGET_FLAGS_RAID_COMPONENT)) {
939 if (targ->handle != 0x0) {
941 "target id %d handle 0x%04x\n", id, targ->handle);
947 targ->devinfo = device_info;
948 targ->devname = le32toh(config_page.DeviceName.High);
949 targ->devname = (targ->devname << 32) |
951 targ->encl_handle = le16toh(config_page.EnclosureHandle);
952 targ->encl_slot = le16toh(config_page.Slot);
953 targ->encl_level = config_page.EnclosureLevel;
954 targ->connector_name[0] = config_page.ConnectorName[0];
955 targ->connector_name[1] = config_page.ConnectorName[1];
956 targ->connector_name[2] = config_page.ConnectorName[2];
957 targ->connector_name[3] = config_page.ConnectorName[3];
958 targ->handle = handle;
959 targ->parent_handle = le16toh(config_page.ParentDevHandle);
960 targ->sasaddr = mpr_to_u64(&config_page.SASAddress);
961 targ->parent_sasaddr = le64toh(parent_sas_address);
962 targ->parent_devinfo = parent_devinfo;
963 targ->tid = id;
964 targ->linkrate = (linkrate>>4);
965 targ->flags = 0;
967 targ->flags = MPR_TARGET_IS_SATA_SSD;
973 targ->scsi_req_desc_type =
978 targ->encl_level_valid = TRUE;
980 TAILQ_INIT(&targ->commands);
981 TAILQ_INIT(&targ->timedout_commands);
982 while (!SLIST_EMPTY(&targ->luns)) {
983 lun = SLIST_FIRST(&targ->luns);
984 SLIST_REMOVE_HEAD(&targ->luns, lun_link);
987 SLIST_INIT(&targ->luns);
989 mpr_describe_devinfo(targ->devinfo, devstring, 80);
992 mpr_describe_table(mpr_linkrate_names, targ->linkrate),
993 targ->handle, targ->encl_handle, targ->encl_slot);
994 if (targ->encl_level_valid) {
996 "and connector name (%4s)\n", targ->encl_level,
997 targ->connector_name);
999 mprsas_rescan_target(sc, targ);
1000 mpr_dprint(sc, MPR_MAPPING, "Target id 0x%x added\n", targ->tid);
1013 targ->timeouts++;
1016 if ((targ->tm = mprsas_alloc_tm(sc)) != NULL) {
1020 targ->tm->cm_targ = targ;
1021 mprsas_send_reset(sc, targ->tm,
1253 struct mprsas_target *targ;
1324 targ = &sassc->targets[id];
1325 targ->devinfo = device_info;
1326 targ->encl_handle = le16toh(config_page.EnclosureHandle);
1327 targ->encl_slot = le16toh(config_page.Slot);
1328 targ->encl_level = config_page.EnclosureLevel;
1329 targ->connector_name[0] = ((char *)&config_page.ConnectorName)[0];
1330 targ->connector_name[1] = ((char *)&config_page.ConnectorName)[1];
1331 targ->connector_name[2] = ((char *)&config_page.ConnectorName)[2];
1332 targ->connector_name[3] = ((char *)&config_page.ConnectorName)[3];
1333 targ->is_nvme = device_info & MPI26_PCIE_DEVINFO_NVME;
1334 targ->MDTS = config_page2.MaximumDataTransferSize;
1335 if (targ->is_nvme)
1336 targ->controller_reset_timeout = config_page2.ControllerResetTO;
1341 targ->encl_level_valid = TRUE;
1342 targ->handle = handle;
1343 targ->parent_handle = le16toh(config_page.ParentDevHandle);
1344 targ->sasaddr = mpr_to_u64(&config_page.WWID);
1345 targ->parent_sasaddr = le64toh(parent_wwid);
1346 targ->parent_devinfo = parent_devinfo;
1347 targ->tid = id;
1348 targ->linkrate = linkrate;
1349 targ->flags = 0;
1354 targ->scsi_req_desc_type =
1357 TAILQ_INIT(&targ->commands);
1358 TAILQ_INIT(&targ->timedout_commands);
1359 while (!SLIST_EMPTY(&targ->luns)) {
1360 lun = SLIST_FIRST(&targ->luns);
1361 SLIST_REMOVE_HEAD(&targ->luns, lun_link);
1364 SLIST_INIT(&targ->luns);
1366 mpr_describe_devinfo(targ->devinfo, devstring, 80);
1369 mpr_describe_table(mpr_pcie_linkrate_names, targ->linkrate),
1370 targ->handle, targ->encl_handle, targ->encl_slot);
1371 if (targ->encl_level_valid) {
1373 "and connector name (%4s)\n", targ->encl_level,
1374 targ->connector_name);
1376 mprsas_rescan_target(sc, targ);
1377 mpr_dprint(sc, MPR_MAPPING, "Target id 0x%x added\n", targ->tid);
1388 struct mprsas_target *targ;
1414 targ = &sassc->targets[id];
1415 targ->tid = id;
1416 targ->handle = handle;
1417 targ->devname = wwid;
1418 TAILQ_INIT(&targ->commands);
1419 TAILQ_INIT(&targ->timedout_commands);
1420 while (!SLIST_EMPTY(&targ->luns)) {
1421 lun = SLIST_FIRST(&targ->luns);
1422 SLIST_REMOVE_HEAD(&targ->luns, lun_link);
1425 SLIST_INIT(&targ->luns);
1426 mprsas_rescan_target(sc, targ);
1428 targ->tid, wwid);