Lines Matching defs:props
282 struct ib_port_attr *props)
293 memset(props, 0, sizeof(*props));
295 /* Possible bad flows are checked before filling out props so in case
307 translate_eth_ext_proto_oper(eth_prot_oper, &props->active_speed,
308 &props->active_width);
310 translate_eth_proto_oper(eth_prot_oper, &props->active_speed,
311 &props->active_width);
313 props->port_cap_flags |= IB_PORT_CM_SUP;
314 props->port_cap_flags |= IB_PORT_IP_BASED_GIDS;
316 props->gid_tbl_len = MLX5_CAP_ROCE(dev->mdev,
318 props->max_mtu = IB_MTU_4096;
319 props->max_msg_sz = 1 << MLX5_CAP_GEN(dev->mdev, log_max_msg);
320 props->pkey_tbl_len = 1;
321 props->state = IB_PORT_DOWN;
322 props->phys_state = 3;
325 props->qkey_viol_cntr = qkey_viol_cntr;
332 props->state = IB_PORT_ACTIVE;
333 props->phys_state = 5;
340 props->active_mtu = min(props->max_mtu, ndev_ib_mtu);
495 struct ib_device_attr *props)
510 props->atomic_cap = IB_ATOMIC_HCA;
512 props->atomic_cap = IB_ATOMIC_NONE;
634 struct ib_device_attr *props,
657 memset(props, 0, sizeof(*props));
659 &props->sys_image_guid);
663 err = mlx5_query_max_pkeys(ibdev, &props->max_pkeys);
667 err = mlx5_query_vendor_id(ibdev, &props->vendor_id);
671 props->fw_ver = ((u64)fw_rev_maj(dev->mdev) << 32) |
674 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
680 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
682 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
684 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
686 props->device_cap_flags |= IB_DEVICE_XRC;
688 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW |
690 props->max_mw = 1 << MLX5_CAP_GEN(mdev, log_max_mkey);
692 props->device_cap_flags |= IB_DEVICE_SG_GAPS_REG;
694 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
696 props->device_cap_flags |= IB_DEVICE_SIGNATURE_HANDOVER;
698 props->sig_prot_cap = IB_PROT_T10DIF_TYPE_1 |
701 props->sig_guard_cap = IB_GUARD_T10DIF_CRC |
705 props->device_cap_flags |= IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
709 props->device_cap_flags |= IB_DEVICE_RAW_IP_CSUM;
743 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
744 props->device_cap_flags |= IB_DEVICE_UD_TSO;
749 props->device_cap_flags |= IB_DEVICE_RAW_SCATTER_FCS;
752 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
754 props->vendor_part_id = mdev->pdev->device;
755 props->hw_ver = mdev->pdev->revision;
757 props->max_mr_size = ~0ull;
758 props->page_size_cap = ~(min_page_size - 1);
759 props->max_qp = 1 << MLX5_CAP_GEN(mdev, log_max_qp);
760 props->max_qp_wr = 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz);
767 props->max_sge = min(max_rq_sg, max_sq_sg);
768 props->max_sge_rd = MLX5_MAX_SGE_RD;
769 props->max_cq = 1 << MLX5_CAP_GEN(mdev, log_max_cq);
770 props->max_cqe = (1 << MLX5_CAP_GEN(mdev, log_max_cq_sz)) - 1;
771 props->max_mr = 1 << MLX5_CAP_GEN(mdev, log_max_mkey);
772 props->max_pd = 1 << MLX5_CAP_GEN(mdev, log_max_pd);
773 props->max_qp_rd_atom = 1 << MLX5_CAP_GEN(mdev, log_max_ra_req_qp);
774 props->max_qp_init_rd_atom = 1 << MLX5_CAP_GEN(mdev, log_max_ra_res_qp);
775 props->max_srq = 1 << MLX5_CAP_GEN(mdev, log_max_srq);
776 props->max_srq_wr = (1 << MLX5_CAP_GEN(mdev, log_max_srq_sz)) - 1;
777 props->local_ca_ack_delay = MLX5_CAP_GEN(mdev, local_ca_ack_delay);
778 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
779 props->max_srq_sge = max_rq_sg - 1;
780 props->max_fast_reg_page_list_len =
782 get_atomic_caps(dev, props);
783 props->masked_atomic_cap = IB_ATOMIC_NONE;
784 props->max_mcast_grp = 1 << MLX5_CAP_GEN(mdev, log_max_mcg);
785 props->max_mcast_qp_attach = MLX5_CAP_GEN(mdev, max_qp_mcg);
786 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
787 props->max_mcast_grp;
788 props->max_map_per_fmr = INT_MAX; /* no limit in ConnectIB */
789 props->hca_core_clock = MLX5_CAP_GEN(mdev, device_frequency_khz);
790 props->timestamp_mask = 0x7FFFFFFFFFFFFFFFULL;
794 props->device_cap_flags |= IB_DEVICE_ON_DEMAND_PAGING;
795 props->odp_caps = dev->odp_caps;
799 props->device_cap_flags |= IB_DEVICE_CROSS_CHANNEL;
802 props->device_cap_flags |= IB_DEVICE_VIRTUAL_FUNCTION;
806 props->rss_caps.max_rwq_indirection_tables =
808 props->rss_caps.max_rwq_indirection_table_size =
810 props->rss_caps.supported_qpts = 1 << IB_QPT_RAW_PACKET;
811 props->max_wq_type_rq =
906 struct ib_port_attr *props)
926 memset(props, 0, sizeof(*props));
934 props->lid = MLX5_GET(hca_vport_context, ctx, lid);
935 props->lmc = MLX5_GET(hca_vport_context, ctx, lmc);
936 props->sm_lid = MLX5_GET(hca_vport_context, ctx, sm_lid);
937 props->sm_sl = MLX5_GET(hca_vport_context, ctx, sm_sl);
938 props->state = MLX5_GET(hca_vport_context, ctx, vport_state);
939 props->phys_state = MLX5_GET(hca_vport_context, ctx,
941 props->port_cap_flags = MLX5_GET(hca_vport_context, ctx, cap_mask1);
942 props->gid_tbl_len = mlx5_get_gid_table_len(MLX5_CAP_GEN(mdev, gid_table_size));
943 props->max_msg_sz = 1 << MLX5_CAP_GEN(mdev, log_max_msg);
944 props->pkey_tbl_len = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(mdev, pkey_table_size));
945 props->bad_pkey_cntr = MLX5_GET(hca_vport_context, ctx,
947 props->qkey_viol_cntr = MLX5_GET(hca_vport_context, ctx,
949 props->subnet_timeout = MLX5_GET(hca_vport_context, ctx,
951 props->init_type_reply = MLX5_GET(hca_vport_context, ctx,
953 props->grh_required = MLX5_GET(hca_vport_context, ctx, grh_required);
962 &props->active_width);
966 props->active_speed = (u8)ptys->ib_proto_oper;
973 props->max_mtu = pmtu->max_mtu;
974 props->active_mtu = pmtu->oper_mtu;
983 &props->max_vl_num);
992 struct ib_port_attr *props)
996 return mlx5_query_mad_ifc_port(ibdev, port, props);
999 return mlx5_query_hca_port(ibdev, port, props);
1002 return mlx5_query_port_roce(ibdev, port, props);
1048 struct ib_device_modify *props)
1065 memcpy(&in, props->node_desc, IB_DEVICE_NODE_DESC_MAX);
1071 memcpy(ibdev->node_desc, props->node_desc, IB_DEVICE_NODE_DESC_MAX);
1077 struct ib_port_modify *props)
1098 tmp = (attr.port_cap_flags | props->set_port_cap_mask) &
1099 ~props->clr_port_cap_mask;