Lines Matching refs:err
233 int err = 0;
237 err = mlx4_QUERY_FUNC(dev, &func, 0);
238 if (err) {
240 return err;
245 err |= MLX4_QUERY_FUNC_NUM_SYS_EQS;
247 return err;
315 int err = 0;
317 err = mlx4_QUERY_PORT(dev, port, port_cap);
319 if (err)
322 return err;
347 int err;
350 err = mlx4_QUERY_DEV_CAP(dev, dev_cap);
351 if (err) {
353 return err;
382 err = _mlx4_dev_port(dev, i, dev_cap->port_cap + i);
383 if (err) {
385 return err;
448 err = mlx4_QUERY_HCA(dev, &hca_param);
455 if (err || hca_param.phv_check_en)
671 int err;
679 err = mlx4_get_pcie_dev_link_caps(dev, &speed_cap, &width_cap);
680 if (err) {
686 err = pcie_get_minimum_link(dev->persist->pdev, &speed, &width);
687 if (err || speed == PCI_SPEED_UNKNOWN ||
808 int err;
816 err = mlx4_QUERY_HCA(dev, &hca_param);
817 if (err) {
819 return err;
836 err = mlx4_dev_cap(dev, &dev_cap);
837 if (err) {
839 return err;
842 err = mlx4_QUERY_FW(dev);
843 if (err)
874 err = mlx4_QUERY_FUNC_CAP(dev, 0, &func_cap);
875 if (err) {
877 err);
878 return err;
922 err = -ENOMEM;
927 err = mlx4_QUERY_FUNC_CAP(dev, i, &func_cap);
928 if (err) {
930 i, err);
940 err = mlx4_get_slave_pkey_gid_tbl_len(dev, i,
943 if (err)
955 err = -ENOMEM;
1013 return err;
1044 int err = 0;
1059 err = mlx4_SET_PORT(dev, port, -1);
1060 if (err) {
1067 err = mlx4_register_device(dev);
1068 if (err) {
1076 return err;
1107 int err = 0;
1113 err = -EINVAL;
1136 err = -EINVAL;
1140 if (err) {
1147 err = mlx4_check_port_params(mdev, new_types);
1148 if (err)
1157 err = mlx4_change_port_types(mdev, new_types);
1163 return err;
1175 int err;
1187 err = -EINVAL;
1191 err = __set_port_type(info, port_type);
1196 return err ? err : count;
1252 int err, port, mtu, ibta_mtu = -1;
1259 err = kstrtoint(buf, 0, &mtu);
1260 if (!err)
1263 if (err || ibta_mtu < 0) {
1275 err = mlx4_SET_PORT(mdev, port, -1);
1276 if (err) {
1282 err = mlx4_register_device(mdev);
1286 return err ? err : count;
1293 int err = 0;
1329 err = mlx4_bond_mac_table(dev);
1330 if (err)
1331 return err;
1332 err = mlx4_bond_vlan_table(dev);
1333 if (err)
1335 err = mlx4_bond_fs_rules(dev);
1336 if (err)
1344 return err;
1430 int err;
1448 err = -EINVAL;
1451 err = 0;
1453 err = mlx4_virt2phy_port_map(dev, port1, port2);
1454 if (!err) {
1460 mlx4_err(dev, "Failed to change port mape: %d\n", err);
1465 return err;
1472 int err;
1481 err = mlx4_MAP_FA(dev, priv->fw.fw_icm);
1482 if (err) {
1487 err = mlx4_RUN_FW(dev);
1488 if (err) {
1500 return err;
1507 int err;
1510 err = mlx4_init_icm_table(dev, &priv->qp_table.cmpt_table,
1517 if (err)
1518 goto err;
1520 err = mlx4_init_icm_table(dev, &priv->srq_table.cmpt_table,
1526 if (err)
1529 err = mlx4_init_icm_table(dev, &priv->cq_table.cmpt_table,
1535 if (err)
1539 err = mlx4_init_icm_table(dev, &priv->eq_table.cmpt_table,
1544 if (err)
1558 err:
1559 return err;
1568 int err;
1570 err = mlx4_SET_ICM_SIZE(dev, icm_size, &aux_pages);
1571 if (err) {
1573 return err;
1587 err = mlx4_MAP_ICM_AUX(dev, priv->fw.aux_icm);
1588 if (err) {
1593 err = mlx4_init_cmpt_table(dev, init_hca->cmpt_base, dev_cap->cmpt_entry_sz);
1594 if (err) {
1601 err = mlx4_init_icm_table(dev, &priv->eq_table.table,
1604 if (err) {
1620 err = mlx4_init_icm_table(dev, &priv->mr_table.mtt_table,
1625 if (err) {
1630 err = mlx4_init_icm_table(dev, &priv->mr_table.dmpt_table,
1635 if (err) {
1640 err = mlx4_init_icm_table(dev, &priv->qp_table.qp_table,
1646 if (err) {
1651 err = mlx4_init_icm_table(dev, &priv->qp_table.auxc_table,
1657 if (err) {
1662 err = mlx4_init_icm_table(dev, &priv->qp_table.altc_table,
1668 if (err) {
1673 err = mlx4_init_icm_table(dev, &priv->qp_table.rdmarc_table,
1679 if (err) {
1684 err = mlx4_init_icm_table(dev, &priv->cq_table.table,
1689 if (err) {
1694 err = mlx4_init_icm_table(dev, &priv->srq_table.table,
1699 if (err) {
1711 err = mlx4_init_icm_table(dev, &priv->mcg_table.table,
1717 if (err) {
1763 return err;
1805 int err = 0;
1816 err = -ENOMEM;
1818 return err;
1991 goto err;
2002 goto err;
2008 goto err;
2011 goto err;
2014 goto err;
2017 goto err;
2022 err:
2180 int err = 0;
2183 err = mlx4_QUERY_FW(dev);
2184 if (err) {
2185 if (err == -EACCES)
2189 return err;
2192 err = mlx4_load_fw(dev);
2193 if (err) {
2195 return err;
2200 err = mlx4_MOD_STAT_CFG(dev, &mlx4_cfg);
2201 if (err)
2205 return err;
2217 int err;
2220 err = mlx4_dev_cap(dev, &dev_cap);
2221 if (err) {
2223 return err;
2233 err = mlx4_get_phys_port_id(dev);
2234 if (err)
2253 err = icm_size;
2254 return err;
2273 err = mlx4_init_icm(dev, &dev_cap, &init_hca, icm_size);
2274 if (err)
2275 return err;
2277 err = mlx4_INIT_HCA(dev, &init_hca);
2278 if (err) {
2284 err = mlx4_query_func(dev, &dev_cap);
2285 if (err < 0) {
2288 } else if (err & MLX4_QUERY_FUNC_NUM_SYS_EQS) {
2301 err = mlx4_QUERY_HCA(dev, &init_hca);
2302 if (err) {
2345 err = mlx4_init_slave(dev);
2346 if (err) {
2347 if (err != -EAGAIN)
2349 return err;
2352 err = mlx4_slave_cap(dev);
2353 if (err) {
2366 err = mlx4_QUERY_ADAPTER(dev, &adapter);
2367 if (err) {
2373 err = mlx4_config_dev_retrieval(dev, ¶ms);
2374 if (err && err != -ENOTSUPP) {
2376 } else if (!err) {
2407 return err;
2452 int port, err = 0;
2459 err = mlx4_counter_alloc(dev, &idx);
2461 if (!err || err == -ENOSPC) {
2463 } else if (err == -ENOENT) {
2464 err = 0;
2466 } else if (mlx4_is_slave(dev) && err == -EINVAL) {
2470 err = 0;
2472 mlx4_err(dev, "%s: failed to allocate default counter port %d err %d\n",
2473 __func__, port + 1, err);
2475 return err;
2482 return err;
2504 int err;
2507 err = mlx4_cmd_imm(dev, 0, &out_param, RES_COUNTER,
2510 if (!err)
2513 return err;
2523 int err;
2530 err = mlx4_cmd_box(dev, 0, if_stat_mailbox->dma, if_stat_in_mod, 0,
2535 return err;
2609 int err;
2613 err = mlx4_init_uar_table(dev);
2614 if (err) {
2616 return err;
2619 err = mlx4_uar_alloc(dev, &priv->driver_uar);
2620 if (err) {
2628 err = -ENOMEM;
2632 err = mlx4_init_pd_table(dev);
2633 if (err) {
2638 err = mlx4_init_xrcd_table(dev);
2639 if (err) {
2644 err = mlx4_init_mr_table(dev);
2645 if (err) {
2651 err = mlx4_init_mcg_table(dev);
2652 if (err) {
2656 err = mlx4_config_mad_demux(dev);
2657 if (err) {
2663 err = mlx4_init_eq_table(dev);
2664 if (err) {
2669 err = mlx4_cmd_use_events(dev);
2670 if (err) {
2675 err = mlx4_NOP(dev);
2676 if (err) {
2692 err = mlx4_init_cq_table(dev);
2693 if (err) {
2698 err = mlx4_init_srq_table(dev);
2699 if (err) {
2704 err = mlx4_init_qp_table(dev);
2705 if (err) {
2711 err = mlx4_init_counters_table(dev);
2712 if (err && err != -ENOENT) {
2718 err = mlx4_allocate_default_counters(dev);
2719 if (err) {
2727 err = mlx4_get_port_ib_caps(dev, port,
2729 if (err)
2731 port, err);
2750 err = mlx4_SET_PORT(dev, port, mlx4_is_master(dev) ?
2752 if (err) {
2805 return err;
2932 int err = 0;
2954 err = device_create_file(&dev->persist->pdev->dev, &info->port_attr);
2955 if (err) {
2971 err = device_create_file(&dev->persist->pdev->dev,
2973 if (err) {
2980 return err;
3103 int err = 0;
3130 err = pci_enable_sriov(pdev, total_vfs);
3132 if (err) {
3133 mlx4_err(dev, "Failed to enable SR-IOV, continuing without SR-IOV (err = %d)\n",
3134 err);
3175 int err = 0;
3179 err = pci_enable_device(pdev);
3180 if (!err)
3185 return err;
3206 int err;
3238 err = mlx4_get_ownership(dev);
3239 if (err) {
3240 if (err < 0)
3241 return err;
3256 err = mlx4_reset(dev);
3257 if (err) {
3277 err = mlx4_cmd_init(dev);
3278 if (err) {
3292 err = mlx4_multi_func_init(dev);
3293 if (err) {
3300 err = mlx4_init_fw(dev);
3301 if (err) {
3312 err = -ENOMEM;
3316 err = mlx4_QUERY_DEV_CAP(dev, dev_cap);
3317 if (err) {
3337 err = mlx4_reset(dev);
3338 if (err) {
3350 err = mlx4_QUERY_DEV_CAP(dev, dev_cap);
3351 if (err) {
3361 err = mlx4_init_hca(dev);
3362 if (err) {
3363 if (err == -EACCES) {
3391 err = mlx4_cmd_init(dev);
3392 if (err) {
3421 err = -EINVAL;
3444 err = mlx4_multi_func_init(dev);
3445 if (err) {
3451 err = mlx4_alloc_eq_table(dev);
3452 if (err)
3461 err = -ENOSYS;
3467 err = mlx4_init_steering(dev);
3468 if (err)
3474 err = mlx4_setup_hca(dev);
3475 if (err == -EBUSY && (dev->flags & MLX4_FLAG_MSI_X) &&
3480 err = mlx4_setup_hca(dev);
3483 if (err)
3490 err = mlx4_ARM_COMM_CHANNEL(dev);
3491 if (err) {
3493 err);
3499 err = mlx4_init_port_info(dev, port);
3500 if (err)
3507 err = mlx4_register_device(dev);
3508 if (err)
3593 return err;
3599 int err;
3609 err = mlx4_pci_enable_device(&priv->dev);
3610 if (err) {
3612 return err;
3624 err = -EINVAL;
3633 err = -EINVAL;
3641 err = -EINVAL;
3651 err = -EINVAL;
3661 err = -ENODEV;
3666 err = -ENODEV;
3670 err = pci_request_regions(pdev, DRV_NAME);
3671 if (err) {
3678 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
3679 if (err) {
3681 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3682 if (err) {
3687 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
3688 if (err) {
3690 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3691 if (err) {
3712 err = -ENODEV;
3719 err = -ENODEV;
3725 err = mlx4_catas_init(&priv->dev);
3726 if (err)
3729 err = mlx4_load_one(pdev, pci_dev_data, total_vfs, nvfs, priv, 0);
3730 if (err)
3744 return err;
3954 int err, i;
3961 err = mlx4_change_port_types(dev, types);
3966 return err;
3975 int pci_dev_data, err, total_vfs;
3982 err = mlx4_load_one(pdev, pci_dev_data, total_vfs, nvfs, priv, 1);
3983 if (err) {
3984 mlx4_err(dev, "%s: ERROR: mlx4_load_one failed, pci_name=%s, err=%d\n",
3985 __func__, pci_name(pdev), err);
3986 return err;
3989 err = restore_current_port_types(dev, dev->persist->curr_port_type,
3991 if (err)
3993 err);
3995 return err;
4084 int err;
4087 err = mlx4_pci_enable_device(dev);
4088 if (err) {
4089 mlx4_err(dev, "Can not re-enable device, err=%d\n", err);
4104 int err;
4112 err = mlx4_load_one(pdev, priv->pci_dev_data, total_vfs, nvfs,
4114 if (err) {
4115 mlx4_err(dev, "%s: mlx4_load_one failed, err=%d\n",
4116 __func__, err);
4120 err = restore_current_port_types(dev, dev->persist->
4123 if (err)
4124 mlx4_err(dev, "could not restore original port types (%d)\n", err);