Lines Matching refs:cpu_to_be32
81 case 4: *(__be32 *) __d = cpu_to_be32(source); break; \
1888 *(inbox + INIT_HCA_FLAGS_OFFSET / 4) &= ~cpu_to_be32(1 << 1);
1890 *(inbox + INIT_HCA_FLAGS_OFFSET / 4) |= cpu_to_be32(1 << 1);
1895 *(inbox + INIT_HCA_FLAGS_OFFSET / 4) |= cpu_to_be32(1);
1899 *(inbox + INIT_HCA_FLAGS_OFFSET / 4) |= cpu_to_be32(1 << 3);
1903 *(inbox + INIT_HCA_FLAGS_OFFSET / 4) |= cpu_to_be32(1 << 2);
1907 *(inbox + INIT_HCA_FLAGS_OFFSET / 4) |= cpu_to_be32(1 << 4);
1911 *(inbox + INIT_HCA_FLAGS_OFFSET / 4) |= cpu_to_be32(1 << 13);
1915 *(inbox + INIT_HCA_EQE_CQE_OFFSETS / 4) |= cpu_to_be32(1 << 29);
1924 *(inbox + INIT_HCA_EQE_CQE_OFFSETS / 4) |= cpu_to_be32(1 << 30);
1949 *(inbox + INIT_HCA_RECOVERABLE_ERROR_EVENT_OFFSET / 4) |= cpu_to_be32(1U << 31);
1971 cpu_to_be32(1 <<
2480 config_dev.update_flags = cpu_to_be32(MLX4_VXLAN_UDP_DPORT);
2493 config_dev.update_flags = cpu_to_be32(MLX4_DISABLE_RX_PORT);
2496 cpu_to_be32(CONFIG_DISABLE_RX_PORT);
2506 config_dev.update_flags = cpu_to_be32(MLX4_ROCE_V2_UDP_DPORT);
2527 v2p->v_port1 = cpu_to_be32(port1);
2528 v2p->v_port2 = cpu_to_be32(port2);
2746 (__force u32)cpu_to_be32(token) << 16),