dev/ixl/ixl_pf_main.c

2742 	struct i40e_aq_get_phy_abilities_resp abilities;
2748 	    FALSE, FALSE, &abilities, NULL);
2763 	config.phy_type = abilities.phy_type;
2764 	config.phy_type_ext = abilities.phy_type_ext;
2765 	config.abilities = abilities.abilities
2767 	config.eee_capability = abilities.eee_capability;
2768 	config.eeer = abilities.eeer_val;
2769 	config.low_power_ctrl = abilities.d3_lpan;
2770 	config.fec_config = abilities.fec_cfg_curr_mod_ext_info
3130 	struct i40e_aq_get_phy_abilities_resp abilities;
3137 	    FALSE, TRUE, &abilities, NULL);
3146 	phy_type = abilities.phy_type;
3147 	phy_type_ext = abilities.phy_type_ext;
3151 	    FALSE, FALSE, &abilities, NULL);
3162 	config.link_speed = abilities.link_speed;
3163 	config.abilities = abilities.abilities;
3164 	config.eee_capability = abilities.eee_capability;
3165 	config.eeer = abilities.eeer_val;
3166 	config.low_power_ctrl = abilities.d3_lpan;
3167 	config.fec_config = abilities.fec_cfg_curr_mod_ext_info
3176 		config.abilities &= ~(I40E_AQ_PHY_FLAG_PAUSE_TX |
3181 			config.abilities |= I40E_AQ_PHY_FLAG_PAUSE_TX |
3185 			config.abilities |= I40E_AQ_PHY_FLAG_PAUSE_RX;
3188 			config.abilities |= I40E_AQ_PHY_FLAG_PAUSE_TX;
3361 	struct i40e_aq_get_phy_abilities_resp abilities;
3372 	    FALSE, arg2 != 0, &abilities, NULL);
3384 	    abilities.phy_type);
3386 	if (abilities.phy_type != 0) {
3389 			if ((1 << i) & abilities.phy_type)
3395 	    abilities.phy_type_ext);
3397 	if (abilities.phy_type_ext != 0) {
3400 			if ((1 << i) & abilities.phy_type_ext)
3406 	sbuf_printf(buf, "\nSpeed    : %02x", abilities.link_speed);
3407 	if (abilities.link_speed != 0) {
3411 			link_speed = (1 << i) & abilities.link_speed;
3429 	    abilities.abilities, abilities.eee_capability,
3430 	    abilities.eeer_val, abilities.d3_lpan,
3431 	    abilities.phy_id[0], abilities.phy_id[1],
3432 	    abilities.phy_id[2], abilities.phy_id[3],
3433 	    abilities.module_type[0], abilities.module_type[1],
3434 	    abilities.module_type[2], (abilities.fec_cfg_curr_mod_ext_info & 0xe0) >> 5,
3435 	    abilities.fec_cfg_curr_mod_ext_info & 0x1F,
3436 	    abilities.ext_comp_code);
4184 ixl_get_fec_config(struct ixl_pf *pf, struct i40e_aq_get_phy_abilities_resp *abilities,
4195 	    FALSE, FALSE, abilities, NULL);
4204 	*is_set = !!(abilities->fec_cfg_curr_mod_ext_info & bit_pos);
4209 ixl_set_fec_config(struct ixl_pf *pf, struct i40e_aq_get_phy_abilities_resp *abilities,
4219 	config.fec_config = abilities->fec_cfg_curr_mod_ext_info & ~(bit_pos);
4222 	if (config.fec_config != abilities->fec_cfg_curr_mod_ext_info) {
4223 		config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
4224 		config.phy_type = abilities->phy_type;
4225 		config.phy_type_ext = abilities->phy_type_ext;
4226 		config.link_speed = abilities->link_speed;
4227 		config.eee_capability = abilities->eee_capability;
4228 		config.eeer = abilities->eeer_val;
4229 		config.low_power_ctrl = abilities->d3_lpan;
4250 	struct i40e_aq_get_phy_abilities_resp abilities;
4251 	error = ixl_get_fec_config(pf, &abilities, I40E_AQ_ENABLE_FEC_KR, &mode);
4259 	return ixl_set_fec_config(pf, &abilities, I40E_AQ_SET_FEC_ABILITY_KR, !!(mode));
4268 	struct i40e_aq_get_phy_abilities_resp abilities;
4269 	error = ixl_get_fec_config(pf, &abilities, I40E_AQ_ENABLE_FEC_RS, &mode);
4277 	return ixl_set_fec_config(pf, &abilities, I40E_AQ_SET_FEC_ABILITY_RS, !!(mode));
4286 	struct i40e_aq_get_phy_abilities_resp abilities;
4287 	error = ixl_get_fec_config(pf, &abilities, I40E_AQ_REQUEST_FEC_KR, &mode);
4295 	return ixl_set_fec_config(pf, &abilities, I40E_AQ_SET_FEC_REQUEST_KR, !!(mode));
4304 	struct i40e_aq_get_phy_abilities_resp abilities;
4305 	error = ixl_get_fec_config(pf, &abilities, I40E_AQ_REQUEST_FEC_RS, &mode);
4313 	return ixl_set_fec_config(pf, &abilities, I40E_AQ_SET_FEC_REQUEST_RS, !!(mode));
4322 	struct i40e_aq_get_phy_abilities_resp abilities;
4323 	error = ixl_get_fec_config(pf, &abilities, I40E_AQ_ENABLE_FEC_AUTO, &mode);
4331 	return ixl_set_fec_config(pf, &abilities, I40E_AQ_SET_FEC_AUTO, !!(mode));